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1、,MOS晶体管的动作,MOS晶体管实质上是一种使电流时而流过，时而切断的开关,n+,n+,P型硅基板,栅极（金属）,绝缘层（SiO2）,半导体基板,漏极,源极,N沟MOS晶体管的基本结构,MOSFET的基本结构,1,t课件,MOS晶体管的动作 MOS晶体管实质上是一种使n+n+P型,silicon substrate,source,drain,gate,oxide,oxide,top oxide,metal connection to source,metal connection to gate,metal connection to drain,polysilicon gate,doped
2、 silicon,field oxide,gate oxide,MOS晶体管的立体结构,2,t课件,silicon substratesourcedrainga,在硅衬底上制作MOS晶体管,silicon substrate,3,t课件,在硅衬底上制作MOS晶体管silicon substrate,4,t课件,silicon substrateoxidefield ox,silicon substrate,oxide,photoresist,5,t课件,silicon substrateoxidephotores,Shadow on photoresist,photoresist,Expose
3、d area of photoresist,Chrome platedglass mask,Ultraviolet Light,silicon substrate,oxide,6,t课件,Shadow on photoresistphotoresi,7,t课件,非感光区域silicon substrate感光区域oxid,Shadow on photoresist,显影,8,t课件,Shadow on photoresistsilicon s,腐蚀,9,t课件,silicon substrateoxideoxidesil,silicon substrate,oxide,oxide,silico
4、n substrate,field oxide,去胶,10,t课件,silicon substrateoxideoxidesil,11,t课件,silicon substrateoxideoxidegat,polysilicon,12,t课件,silicon substrateoxideoxidepol,gate,gate,ultra-thin gate oxide,polysilicongate,13,t课件,silicon substrateoxideoxidegat,photoresist,Scanning direction of ion beam,Implanted ions in
5、photoresist to be removed during resist strip.,source,drain,14,t课件,silicon substrateoxideoxidegat,15,t课件,silicon substrateoxideoxidegat,自对准工艺,在有源区上覆盖一层薄氧化层淀积多晶硅，用多晶硅栅极版图刻蚀多晶硅以多晶硅栅极图形为掩膜板，刻蚀氧化膜离子注入,16,t课件,自对准工艺在有源区上覆盖一层薄氧化层16ppt课件,17,t课件,silicon substratesourcedrainga,18,t课件,silicon substrategatecont
6、act h,19,t课件,silicon substrategatecontact h,完整的简单MOS晶体管结构,20,t课件,完整的简单MOS晶体管结构silicon substrate,CMOSFET,P型 si sub,n+,gate,oxide,n+,gate,oxide,oxide,p+,p+,21,t课件,CMOSFETP型 si subn+gateoxiden+,主要的CMOS工艺,VDD,P阱工艺,N阱工艺,双阱工艺,N-,P+,P+,N+,N+,P+,N+,VSS,VOUT,VIN,VDD,P-,P+,P+,N+,N+,P+,N+,VSS,VOUT,VIN,N-Si,P-S
7、i,N-,I-Si,N+-Si,22,t课件,主要的CMOS工艺VDDP阱工艺N阱工艺双阱工艺P-P+P+,掩膜1： P阱光刻,23,t课件,掩膜1： P阱光刻P-wellP-well N+ N+,具体步骤如下：1生长二氧化硅（湿法氧化）：,Si(固体)+ 2H2O SiO2（固体）+2H2,24,t课件,具体步骤如下：Si(固体)+ 2H2O SiO2（固体）,氧 化,25,t课件,氧 化25ppt课件,2P阱光刻：,涂胶,腌膜对准,曝光,光源,显影,26,t课件,2P阱光刻：涂胶腌膜对准曝光光源显影26ppt课件,27,t课件,27ppt课件,硼掺杂（离子注入）,刻蚀（等离子体刻蚀）,去胶
8、,P+,去除氧化膜,3P阱掺杂：,28,t课件,硼掺杂（离子注入）刻蚀（等离子体刻蚀）去胶P+去除氧化膜P-,29,t课件,29ppt课件,30,t课件,离子源高压电流离子束30ppt课件,掩膜2： 光刻有源区,有源区：nMOS、PMOS 晶体管形成的区域,P-well,P-well,淀积氮化硅 光刻有源区 场区氧化 去除有源区氮化硅及二氧化硅,SiO2隔离岛,31,t课件,掩膜2： 光刻有源区有源区：nMOS、PMOSP+N+N+,有源区,depositednitride layer,有源区光刻板N型p型MOS制作区域(漏-栅-源),32,t课件,有源区deposited有源区光刻板32pp
9、t课件,1. 淀积氮化硅：,氧化膜生长（湿法氧化）,涂胶,有源区光刻板,2. 光刻有源区：,33,t课件,P-well1. 淀积氮化硅：氧化膜生长（湿法氧化）P-we,氮化硅刻蚀去胶,3. 场区氧化：,场区氧化（湿法氧化）,34,t课件,P-well显影P-well氮化硅刻蚀去胶3. 场区氧化：P,掩膜3： 光刻多晶硅,去除氮化硅薄膜及有源区SiO2,P-well,栅极氧化膜,多晶硅栅极,生长栅极氧化膜 淀积多晶硅 光刻多晶硅,35,t课件,掩膜3： 光刻多晶硅P-well去除氮化硅薄膜及有源区Si,生长栅极氧化膜,淀积多晶硅,涂胶光刻,多晶硅光刻板,P-well,多晶硅刻蚀,36,t课件,P
10、-well生长栅极氧化膜P-well淀积多晶硅P-well,掩膜4 ：P+区光刻,1、P+区光刻 2、离子注入B+，栅区有多晶硅做掩蔽， 称为硅栅自对准工艺。 3、去胶,P-well,P+,N+,N+,P+,N-Si,P-well,37,t课件,掩膜4 ：P+区光刻 1、P+区光刻P-wellP+,P+,硼离子注入,去胶,38,t课件,P-wellP+P-wellP+P+硼离子注入去胶38ppt,掩膜5 ：N+区光刻,1、N+区光刻 2、离子注入P+，栅区有多晶硅做掩蔽， 称为硅栅自对准工艺。 3、去胶,P-well,P+,N+,N+,P+,N-Si,P-well,P-well,P+,P+,N
11、+,N+,39,t课件,掩膜5 ：N+区光刻 1、N+区光刻P-wellP+,40,t课件,P-wellN+P-wellP+P+磷离子注入去胶P+P+N,掩膜6 ：光刻接触孔,1、淀积PSG.2、光刻接触孔3、刻蚀接触孔,P-well,P+,N+,N+,P+,N-Si,P-well,磷硅玻璃（PSG),41,t课件,掩膜6 ：光刻接触孔1、淀积PSG.P-wellP+N+N,掩膜6 ：光刻接触孔,淀积PSG,光刻接触孔,去胶,42,t课件,掩膜6 ：光刻接触孔P-wellP+P+N+N+淀积PSG,43,t课件,43ppt课件,掩膜7 ：光刻铝线,1、淀积铝.2、光刻铝3、去胶,P-well,
12、P-well,P+,P+,N+,N+,44,t课件,掩膜7 ：光刻铝线1、淀积铝.P-wellP-wellP+,P-well,P+,P+,N+,N+,场氧,栅极氧化膜,P+区,P-well,N-型硅极板,多晶硅,N+区,45,t课件,P-wellP+P+N+N+铝线PSG场氧栅极氧化膜P+区P,Example: Intel 0.25 micron Process,5 metal layersTi/Al - Cu/Ti/TiNPolysilicon dielectric,46,t课件,Example: Intel 0.25 micron Pro,Interconnect Impact on Chip,47,t课件,Interconnect Impact on Chip47p,掩膜8 ：刻钝化孔,Circuit,PAD,CHIP,48,t课件,掩膜8 ：刻钝化孔CircuitPADCHIP48ppt课件,
