《姜书艳数字逻辑设计及应用ppt课件.ppt》由会员分享，可在线阅读，更多相关《姜书艳数字逻辑设计及应用ppt课件.ppt（64页珍藏版）》请在三一办公上搜索。
1、1,Digital Logic Design and Application (数字逻辑设计及应用),Review of Chapter 2 (第二章内容回顾),General Positional-Number-System Conversion (常用按位计数制的转换)Addition and Subtraction of Non-decimal Numbers (非十进制的加法和减法),2,Review of Chapter 2 (第二章内容回顾),Representation of Negative Numbers (负数的表示)Signed-Magnitude 符号数值（原码）Com
2、plement Number Systems (补码数制) Radix Complement (基数补码) Diminished Radix Complement 基数减1补码（基数反码）,Digital Logic Design and Application (数字逻辑设计及应用),3,Review of Chapter 2 (第二章内容回顾),Binary Signed-Magnitude, Ones Complement, and Twos Complement Representation (二进制的原码、反码、补码表示) 直接由补码(反码)求二进制数值的大小：最高位位权为 -2n-
3、1 (-2n-1 -1) (1011)2补=（ ）10,Digital Logic Design and Application (数字逻辑设计及应用),4,Review of Chapter 2 (第二章内容回顾),Twos Complement Addition and Subtraction (二进制补码的加法和减法)Overflow（溢出）如果加法运算产生的和超出了数制表示的范围，则结果发生了溢出（Overflow）。如何判断溢出？ MSB C in 与 C out 不同,Digital Logic Design and Application (数字逻辑设计及应用),5,Review
4、 of Chapter 2 (第二章内容回顾),How to represent a 1-bit Decimal number with a 4-bit Binary code (如何用 4位二进制码 表示 1位十进制码)？ Binary Coded Decimal (BCD码）(0.301)10=( )8421BCD,Digital Logic Design and Application (数字逻辑设计及应用),6,Review of Chapter 2 (第二章内容回顾),Addition of BCD Digits (BCD数的加法)思考： 两个BCD码 与两个4位二进制数 相加的区别
5、?,Digital Logic Design and Application (数字逻辑设计及应用),7,Digital Logic Design and Application (数字逻辑设计及应用),8,Review of Chapter 2 (第二章内容回顾),Addition of BCD Digits (BCD数的加法)思考：何时需要进行修正？ 如果(X+Y)产生进位信号C 或 在 10101111 之间如何修正？ 结果加6,Digital Logic Design and Application (数字逻辑设计及应用),9,Review of Chapter 2 (第二章内容回顾)
6、,Gray code（格雷码）任意相邻码字间只有一位数位变化最高位的0和1只改变一次最大数回到0也只有一位码元不同,Digital Logic Design and Application (数字逻辑设计及应用),10,2.11 Gray code（格雷码）,Digital Logic Design and Application (数字逻辑设计及应用),构造方法Reflected Code（反射码）直接构造 The bits of an n-bit binary cord word are numbered from right to left, from 0 to n-1. 对 n 位二进
7、制的码字从右到左编号（0 n-1） Bit i of a Gray-code code word is 0 if bits i and i+1 of the corresponding binary code word are the same, else bit i is 1. (若二进制码字的第 i 位和第 i + 1 位相同，则对应的葛莱码码字的第 i 位为0，否则为1。),11,Review of Chapter 2 (第二章内容回顾),Digital Logic Design and Application (数字逻辑设计及应用),From binary number to Gray
8、 code The width is same, the MSB is same; From left to right, if a bit in binary number is same as its left bit, the gray code is 0, if it is different, the gray code is 1. Examples: binary number: 1001 0010 0110 0011 Gray code: 1101 1011 0101 0010,12,Review of Chapter 2 (第二章内容回顾),构造方法异或（XOR）运算：相异为1
9、，相同为0Gn = Bn Bn = GnGn-1 = Bn Bn-1 Bn-1 = Gn Gn-1 G0 = B1 B0 B0 = GnGn-1 G0,Digital Logic Design and Application (数字逻辑设计及应用),13,Chapter 3 Digital Circuits (数字电路),Give a knowledge of the Electrical aspects of Digital Circuits (介绍数字电路中的电气知识),Digital Logic Design and Application (数字逻辑设计及应用),14,Consider
10、 some Questions（思考几个问题）,在模拟的世界中如何表征数字系统？如何将物理上的实际值 映射为逻辑上的 0 和 1 ？什么时候考虑器件的逻辑功能； 什么时候考虑器件的模拟特性？,Digital Logic Design and Application (数字逻辑设计及应用),15,Digital Logic Design and Application (数字逻辑设计及应用),3.1 Logic Signals and Gates(逻辑信号和门电路),How to get the HIGH and LOW Voltage (如何获得高、低电平)？HIGH to 0 or 1 (高
11、电平对应 0 还是 1)？,16,16,Switches,Electronic switches are the basis of binary digital circuitsA switch has three partsSource input, and outputCurrent tries to flow from source input to outputControl inputVoltage controls whether that current can flow,“off”,“on”,output,source,input,output,source,input,con
12、trol,input,control,input,17,17,Switches,The amazing(令人惊奇的） shrinking（逐渐减小的） switch1930s: Relays1940s: Vacuum tubes1950s: Discrete transistor1960s: Integrated circuits (ICs)Initially just a few transistors on ICThen tens, hundreds, thousands.,relay,vacuum tube,discrete transistor,IC,quarter(to see th
13、e relative size),18,18,The CMOS Transistor,CMOS transistorBasic switch in modern ICs,Silicon - not quite a conductor or insulator:Semiconductor,2.3,gate,source,drain,oxide,A positive voltage here.,(a),IC package,IC,.attracts electrons here, turning the channel betweenthe source and drain intoa condu
14、ctor,19,19,The CMOS Transistor,CMOS transistorBasic switch in modern ICs,2.3,20,20,Moores Law,IC capacity（容量，集成度） doubling about every 18 months for several decadesKnown as “Moores Law” after Gordon Moore, co-founder of IntelPredicted（预言） in 1965 predicted that components per IC would double roughly
15、（粗略地，大致上） every year or so,21,Moores Law,For a particular（特定的） number of transistors, the IC area shrinks by half every 18 monthsConsider how much shrinking occurs in just 10 years (try drawing it)Enables incredibly（不能相信的，难以置信的） powerful computation in incredibly tiny devices,22,Moores Law,Todays IC
16、s hold billions of transistorsThe first Pentium processor (early 1990s) needed only 3 million,An Intel Pentium processor IChaving millions of transistors,23,3.1 Logic Signals and Gates(逻辑信号和门电路),Digital Logic Design and Application (数字逻辑设计及应用),从物理的角度考虑电路如何工作，工作中的电气特性实际物理器件不可避免的时间延迟问题从逻辑角度输入、输出的逻辑关系
17、三种基本逻辑：与、或、非,24,24,Boolean Logic GatesBuilding Blocks for Digital Circuits (Because Switches are Hard to Work With),“Logic gates” are better digital circuit building blocks than switches (transistors)Why?.,2.4,Abstraction（提取） reduces complexity!,25,25,Boolean Algebra and its Relation to Digital Circ
18、uits,To understand the benefits of “logic gates” vs. switches, we should first understand Boolean algebra“Traditional” algebraVariables represent real numbers (x, y)Operators（运算器） operate on variables, return real numbers (2.5*x + y - 3),a,26,26,Boolean Algebra and its Relation to Digital Circuits,B
19、oolean AlgebraVariables represent 0 or 1 onlyOperators return 0 or 1 onlyBasic operatorsAND: a AND b returns 1 only when both a=1 and b=1OR: a OR b returns 1 if either (or both) a=1 or b=1NOT: NOT a returns the opposite of a (1 if a=0, 0 if a=1),a,27,1、Basic Logic Function: AND（基本逻辑运算：与）,0 0 00 1 01
20、 0 01 1 1,Logic Expression (逻辑表达式)Z = A B,Switch:1-on,0-off (开关：1通,0断)Lamp: 1-Light,0-out (灯:1亮,0不亮),Produce a 1 output if and only if its inputs are all 1 (当且仅当所有输入全为1时，输出为1),Truth Table (真值表),Logic Circuit,Digital Logic Design and Application (数字逻辑设计及应用),28,2、Basic Logic Function: OR（基本逻辑运算：或）,Log
21、ic Expression (逻辑表达式)：Z = A + B,Produce a 1 output if any input is 1 (只要有任何一个输入为1，输出就为1),0 0 00 1 11 0 11 1 1,Truth Table,Logic Circuit,Digital Logic Design and Application (数字逻辑设计及应用),29,Produce an output value that is the opposite of its input value. (产生一个与输入相反的输出),Usually called an Inverter （通常称为
22、反相器）,Digital Logic Design and Application (数字逻辑设计及应用),3、Basic Logic Function: NOT（基本逻辑运算：非）,Truth Table,Logic Circuit,30,4、NAND and NOR Gates (与非 和 或非),NAND (与非) Logic Expression (逻辑表达式)： Z = ( A B ) Logic Circuit ( 逻辑符号)：,NOR (或非) Logic Expression (逻辑表达式)： Z = ( A + B ) Logic Circuit (逻辑符号)：,Digita
23、l Logic Design and Application (数字逻辑设计及应用),31,Digital Logic Design and Application (数字逻辑设计及应用),Truth Table (真值表),Logical Operation(逻辑运算),NAND (与非),NOR (或非),Logic Circuit(逻辑符号),Logic Expression(逻辑表达式),Y=(A,B),Y=(A+B),A B,0,0,1,1 1,Y,1,1,1,0,Y,1,0,0,0,1,0,0,32,32,Boolean Algebra and its Relation to Di
24、gital Circuits,Developed mid-1800s by George Boole to formalize（使成正式） human thoughtEx: “Ill go to lunch if Mary goes OR John goes, AND Sally does not go.”Let F represent my going to lunch (1 means I go, 0 I dont go)Likewise（类似地）, m for Mary going, j for John, and s for SallyThen F = (m OR j) AND NOT
25、(s),33,33,Converting to Boolean Equations,Q1. A fire sprinkler（洒水器） system should spray（喷） water if high heat is sensed and the system is set to enabled.Answer: Let Boolean variable h represent “high heat is sensed,” e represent “enabled,” and F represent “spraying water.” Then an equation is: F = h
26、 AND e.,a,34,34,Converting to Boolean Equations,Q2. A car alarm should sound if the alarm is enabled, and either the car is shaken or the door is opened. Answer: Let a represent “alarm is enabled,” s represent “car is shaken,” d represent “door is opened,” and F represent “alarm sounds.” Then an equ
27、ation is: F = a AND (s OR d).,a,35,Relating Boolean Algebra to Digital Design,Booleanalgebra,(mid-1800s),Booles intent: formalizehuman thought,Switches,(1930s),Shannon (1938),Digital design,Showed applicationof Boolean algebrato design of switch-based circuits,For telephoneswitching and otherelectro
28、nic uses,36,Digital Logic Design and Application (数字逻辑设计及应用),3.2 Logic Families（逻辑系列）,同一系列的芯片具有类似的输入、输出及内部电路特征，但逻辑功能不同。不同系列的芯片可能不匹配 CMOS系列 TTL逻辑系列,37,Digital Logic Design and Application (数字逻辑设计及应用),3.3 CMOS Logic (CMOS 逻辑),CMOS Logic levels (COMS 逻辑电平),A Typical Logic Circuit: 5-Volt Power Supply (
29、典型的5V电源电压)Other Power-Supply Voltages: 3.3 ,2.5 or 1.8Volts(其它电源电压：3.3V ,2.5V或1.8V),Logic 1 (High)逻辑1（高态）,Logic 0 (Low)逻辑0（低态）,38,Digital Logic Design and Application (数字逻辑设计及应用),2、MOS Transistors (MOS晶体管),Two Types: N-Channel and P-Channel (分为：N沟道 和 P沟道),N-Channel (N沟道),39,Digital Logic Design and
30、Application (数字逻辑设计及应用),2、MOS Transistors (MOS晶体管),Two Types: N-Channel and P-Channel (分为：N沟道 和 P沟道),Usually (通常)： Vgs = 0 Vgs = 0 Rds Very High Off (截止状态) Vgs Rds On (导通状态),40,Digital Logic Design and Application (数字逻辑设计及应用),2、MOS Transistors (MOS晶体管),The Gate of a MOS transistor has a very high im
31、pedance（阻抗）. Over megohm (106 ohms) MOS晶体管栅极阻抗非常高（兆欧）Regardless of gate voltage (无论栅电压如何) Almost no current flows from the gate to source, or from the gate to drain. ( 栅源、栅漏之间几乎没有电流) （ Leakage（漏出） Current, Less than microampere (漏电流, A, 10-6A ）The Gate is Capacitively（容性地） coupled to the source and
32、drain ( 栅极与源和漏极之间有容性耦合) The power need to charge and discharge this capacitance（电容） on each input signal transition accounts for a nontrivial（非平凡的） portion of a circuits power consumption (信号转换时，电容充放电，功耗较大).,41,Digital Logic Design and Application (数字逻辑设计及应用),MOS管的基本开关电路,只要电路参数选择合理,输入低，截止，输出高,输入高，导通
33、，输出低,42,Digital Logic Design and Application (数字逻辑设计及应用),3、Basic CMOS Inverter Circuit( 基本的CMOS反相器),Functional Behavior (工作原理)1、VIN = 0.0VVGSN = 0.0V， Tn Off (截止)VGSP = VIN VDD = 5.0V， Tp On (导通)VOUT VDD = 5.0V,43,3、Basic CMOS Inverter Circuit( 基本的CMOS反相器),2、VIN = VDD = 5.0VVGSN = 5.0V Tn On (导通)VGS
34、P = VIN VDD = 0.0V Tp Off (截止)VOUT 0,Digital Logic Design and Application (数字逻辑设计及应用),44,44,NOT gate,1,0,F,1,x,0,(a),1,0,F,0,x,1,(b),When the input is 0,When the input is 1,45,Digital Logic Design and Application (数字逻辑设计及应用),4、CMOS NAND (CMOS与非门),Functional Behavior (工作原理)：1、Either Input Low, (A、B至少
35、有一个为低), Then Either T1, T3 Off( T1、T3至少有一个截止) Either T2, T4 On( T2、T4至少有一个导通)Z is High Z为高 VDD）,46,4、CMOS NAND Gate (CMOS与非门),2、Both Inputs High (A、B都为高), Then Both T1, T3 On (T1、T3都导通) Both T2, T4 Off (T2，T4都截止) Z is Low Z为低（ 0V）,Digital Logic Design and Application (数字逻辑设计及应用),47,5、CMOS NOR Gate (
36、CMOS或非门),Functional Behavior (工作原理)： 1、 Both Inputs Low (A、B都为低), Then Both T1、T3 Off ( T1、T3都截止) Both T2, T4 On ( T2，T4都导通 ) Z is High Z为高（ VDD）,Digital Logic Design and Application (数字逻辑设计及应用),48,5、CMOS NOR Gate (CMOS或非门),Functional Behavior (工作原理)： 2、 Either Input High (A、B至少有一个为高) Then Either T1
37、、T3 On (T1、T3至少有一个导通)Either T2, T4 Off (T2、T4至少有一个截止) Z is Low Z为低（ 0V）,Digital Logic Design and Application (数字逻辑设计及应用),49,49,Building Circuits Using Gates,Recall（回想） the motion-in-dark exampleTurn on lamp (F=1) when motion sensed (a=1) and no light (b=0)F = a AND NOT(b),50,50,Building Circuits Usi
38、ng Gates,Build using logic gates, AND and NOT, as shownWe just built our first digital circuit!,51,51,Example: Seat Belt Warning Light System,Design circuit for warning lightSensorss=1: seat belt fastened（系紧）k=1: key insertedCapture Boolean equationseat belt not fastened, and key inserted,w = NOT(s)
39、 AND k,52,52,Example: Seat Belt Warning Light System,Convert equation to circuitTiming diagram illustrates circuit behaviorWe set inputs to any valuesOutput set according to circuit,a,a,time,Inputs,Outputs,1,1,1,0,0,0,k,s,w,k,s,w,BeltWarn,Seatbelt,53,53,More examples: Seat belt warning light extensi
40、ons,Only illuminate （照亮）warning light if person is in the seat (p=1), and seat belt not fastened and key insertedw = p AND NOT(s) AND k,k,p,s,w,Belt Warn,a,54,54,More examples: Seat belt warning light extensions,a,Given t=1 for 5 seconds after key inserted. Turn on warning light when t=1 (to check t
41、hat warning lights are working)w = (p AND NOT(s) AND k) OR t,a,k,w,p,s,t,Belt Warn,55,6、 FanIn（扇入）,The Number of Inputs that a Gate have (门电路所具有的输入端的数目)The Additive “on” Resistance of series transistors limits the Fan In of CMOS gates. (导通电阻的可加性限制了CMOS门的扇入数)A large number of inputs can be made by ca
42、scading gates with fewer inputs (可用较少输入门级联得到较多的输入),Digital Logic Design and Application (数字逻辑设计及应用),56,7、Non-inverting Gates (非反相门),(Non-inverting buffers)非反相缓冲器,Digital Logic Design and Application (数字逻辑设计及应用),Add an inverter to the inverse output !,57,7、Non-inverting Gates (非反相门),Digital Logic Des
43、ign and Application (数字逻辑设计及应用),AND gate,58,58,AND gate,0,1,1,1,1,1,1,y,y,F,x,x,(a),0,0,1,0,1,0,1,y,y,F,x,x,(b),When both inputs are 1,When an input is 0,1,0,x,y,F,1,1,0,0,time,59,59,OR gate,0,1,0,0,1,1,1,y,x,x,y,F,(a),0,0,0,0,0,0,1,y,x,x,y,F,(b),When an input is 1,When both inputs are 0,1,0,x,y,F,1
44、,1,0,0,time,60,Digital Logic Design and Application (数字逻辑设计及应用),NAND / NOR,NAND: NMOS serial , PMOS parallel; NOR: NMOS parallel, PMOS serial;,61,Digital Logic Design and Application (数字逻辑设计及应用),Each input control a PMOS and an NMOS;Logic function（功能） is represented by NMOS connections : AND - serie
45、s OR - parallelPMOS is a duality connection.,NAND / NOR,62,8、CMOS AND-OR-INVERT Gate ( CMOS与或非门),Digital Logic Design and Application (数字逻辑设计及应用),AOI,63,8、CMOS OR-AND-INVERT Gate ( CMOS或与非门),Digital Logic Design and Application (数字逻辑设计及应用),OAI,64,A Class Problem,Write out the BCD code of 8421 , 2421 , and Excess-3 for the decimal number, then write out the corresponding binary Gray code: +1247,Digital Logic Design and Application (数字逻辑设计及应用),
