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1、Chapter 9: Operational Amplifiers,9.1 General Considerations9.2 One-Stage Op Amps9.3 Two-Stage Op Amps9.4 Gain Boosting9.5 Comparison9.6 Output Swing,9.7 Common Feedback 9.8 Input Range Limitations9.9 Slew Rate9.10 High-Slew-Rate Op Amps9.11 Power Supply Rejection9.12 Noise in Op Amps,2,Op Amp Defin
2、ition,We loosely define an op amp as a “high-gain differential amplifier.”Usually employed in a feedback system when precision is a requirement.Applications ranging from DC generation, high-speed amplification or filtering.,3,Op Amp Design Challenge,Three decades agoGeneral-purpose blocks as an “ide
3、al” op ampDesign effort is to satisfy an ideal op amp - infinite gain - infinite input impedance - zero output impedance,TodayDesign effort is to make trade-offs for a specific application, often sacrificing the unimportant aspects to improve the critical ones.E.g., gain error vs speed, open loop ga
4、in vs VDD,4,Performance Parameter,Gain(Precision), Bandwidth(Speed): 3-dB/fu Output Swing, Power dissipationNoise, Linearity, Supply Rejection, offsetInput CM Range, Input/Output ImpedanceLarge-Signal behavior (e.g. slew rate),5,Example 9.1,The circuit has a nominal gain of 10. i.e.,1+R1/R2=10.Deter
5、mine the minimal value of A1 for a gain error 1%:,Thus, A11000. Open-loop gain determines precision.,Solution:,6,Example 9.2,Assume the op amp is a single-pole voltage amplifier. For a small step input, calculate the time required for theoutput to reach within 1% and its unity-gain bandwidth if 1+R1
6、/R2=10 and its settling time is less than 5ns.,Speed vs. Bandwidth,Solution:,7,Example 9.3,Explain the circuit behavior if we swap the inverting and non-inverting inputs of the op amp.,Solution:,Positive feedback destabilizes the circuit.Output grows exponentially to non-linearity range.,8,One-Stage
7、 Op Amps,Low-frequency gain: Bandwidth: usually proportional to 1/(CL*Rout)Output Swing (single-side): VDD-3OverdriveMirror pole in single-ended circuitPower and noise: good, with four devices - input noise,9,Example 9.4,Calculate the input common-mode voltage range and theclosed-loop output impedan
8、ce of the unity-gain buffer.,Solution:,Vin,Output impedance:,The closed-loop pole is independent of open-loop output impedance.,10,Telescopic Cascode Op Amps,Low-frequency gain:Speed: Additional polesOutput Swing (single-side): VDD-5OverdriveMirror pole in single-ended Difficult to short telescopic
9、op amp output to inputPower and noise: good, input noise mainly has four devices contribution,11,Example 9.5,For this unity-gain buffer configuration, explain in which region each transistor operates as Vin varies from below to above,Solution: Remedy in switched-capacitor circuitWhen , M4 is in trio
10、de, others are saturated; M2, M4 are saturated; M2, M1 in triode,M4 is in saturation.,Example 9.6,Assuming that the op amp has a high open-loop gain, determine the maximum allowable output swing.,Solution: (one threshold-one overdrive),13,Telescopic Cascode Op Amps Design,Generally, power budget det
11、ermines branch currentGain and Output voltage swingDeal with,Design Procedure (Example 9.7)Define drain current Distribute overdrive voltageCalculate the aspect ratioCalculate the gain with LminIteration by increasing W,L until achieving gain criterionFinally, DC bias voltage setup and exam residual
12、 goals - CMFB is necessary,PMOSCascode_NInput_N,14,Linear Scaling,How to modify design if power budget is different while all the other specifications are the same?Only scale the widths of all the transistors while keeping the lengths constant.,Example 9.6,Explain what aspects of the performance deg
13、rade for a low-power op amp design when we scale down the transistor width.,Solution:The speed of the op amp in driving a capacitive loadThe input-referred noise voltage rises by a square root factor of scale constant. (for input device),Gate Bias Voltage Generation,Ensure bias voltage to track the
14、input CM levelChoose Mb1 to be a narrow, long, “weak” device,15,16,Folded Cascode Op Amps,Recall Folded CascodeNot “stack” the cascode transistor on the input deviceConsume higher powerOutput Voltage Swing: VDD-4overdriveOutput and input could short together,17,Folded Cascode Voltage Gain,Since , th
15、us Two or three times lower than a telescopic topology,18,Effect capacitance on the nondominant pole,At “folding point”, a large capacitance due to a large current device M5 would be added to the total capacitance.,19,NMOS vs. PMOS input,Greater mobility from NMOS input leads to higher gainLowering
16、the pole at folding pointPMOS input is less sensitive to flicker noise(wider WL),20,Folded Cascode Properties,Slighter Higher Output Swing than telescopic Higher Power dissipation, lower voltage gain, lower pole frequency and higher noiseInput and output can be shorted: 2overdrive from boundA better
17、 input CM range,Example 9.9,Design a folded- cascode op amp with an NMOS pair.Specifications: VDD = 3V, differential output swing = 3V,Power dissipation = 10mW, voltage gain = 2000.,Solution:(1)Current allocation(2)Overdrive voltage allocation(3)Aspect ratio calculation(4)Small-signal gain with mini
18、mal length(5)Iteration by increase M5/M1/M4 in turnsNote that the folding point capacitance may limit here.,22,Low Voltage Single-ended Output,M7 is biased at the edge of triode Could M5 always in saturation?Left implementation wastes one threshold voltageStill, single-ended output is unfavorable du
19、e to half output swing and a mirror poleNote that almost all the differential output circuits need a CMFB,23,Two-Stage Op Amps,Voltage headroom in todays design is constrained with low supply voltage and large output swingGain: Output Swing: Vdd-2Overdrive,24,Two-Stage Op Amps with cascode devices,V
20、oltage headroom in todays design is constrained with low supply voltage and large output swingGain:Can we have more stages? Feedback stability limits,25,Two-Stage Op Amps Design,Design the two-stage op amp for VDD = 1V, P = 1mW, a differential output swing of 1 Vpp, and a gain of 100.,Example 9.10,S
21、olution:(1)Current allocation(2)Voltage allocation: 300mV to M7, 200mV to M5, 400mV to M3, 100mV to M1(noise and gm consideration)(3)Calculate aspect ratio(4)Calculate gain 2000,26,Gain Boosting,Increase the output impedance without adding more cascode devices. But how?A transistor preceded by an id
22、eal voltage amplifier exhibits a transconductance of gmA1 and a output resistance of ro.,27,Gain Boosting,Increase the output impedance without adding more cascade devices. But how?First Perspective: A degenerated transistor preceded by an ideal voltage amplifierIn fact, the output resistance is “bo
23、osted. The headroom is similar to a simple degenerated transistor,28,Example 9.11,Determine the resistance seen at the source of M2 without considering body effect.Solution:,29,Basic gain-boosted stage,Current-Voltage feedback increase the output impedance by a factor of A1+1, while the real gm rais
24、ed by A1 is reduced by A1+1 when feedback is applied.- Rout:- Gm: gm1A1/(A1+1)gm1- Rp:(look above P, see example 9.11) (ro1, can be neglected)-,30,Regulated Cascode,Second PerspectiveLoosely view the voltage change divided by Rs and gmroRs.Drain current response can be suppressed as - Vp is constant
25、 - Current through Rs is constantVp is “pinned” to Vb by feedback regulation.,31,Example 9.12,Determine the small-signal values of and . Assume is large.Solution: Current circulates M2,32,Gain boosting Key,The amplifier boosts the gm of the cascode deviceThe amplifier regulates the output current by
26、 monitoring and pinning the source voltage,33,Gain Boosting Circuit Implementation,Simplest a common-source stageAvoid headroom limitation, PMOS common-source stage is better, but M3 could go in triodeFolded-cascode inserts one more stage,34,Example 9.13,Determine the allowable range for Vb.Solution
27、:,35,Gain Boosting with a Differential Pair,One threshold higher than a simple differential circuitMerge two gain boosting blocks to differential one,36,Differential Folded Cascode Gain Boosting,The minimal allowable Vx,Vy is VOD12+VISS1The output impedance of the circuit (Example 9.14),37,Gain Boos
28、ting in Signal Path and Load,Gain boosting can be utilized in the load current sourceTo allow maximum swings, A2 employs NMOS-input.,38,Gain Boosting Frequency Response,Zero:Dominant pole:Non-dominant pole: Above the original-3dB bandwidth,39,Frequency Response Bode Plot,Gain boosting frequency resp
29、onse bode plot Two poles, non-dominant is below the original 3dB pole,40,Example 9.15,Is the dominant-pole approximation valid here.Solution:The second term is typically much greater than unity and the approximation is valid.,41,Comparison,42,Output Swing Calculation,Be careful about distortion and
30、gain errorThe maximum output amplitude that yields an acceptable distortion or gain errorApply a growing sinusoid wave, monitor the resulting output, and calculate the maximum allowable gain,43,Common-Mode Feed Back,Vcm(in) and Vcm(out):,44,Basic Concepts,In fully-differential op amps, the output CM
31、 level is usually not well defined. - Case 1: , Vx,Vy decreases, Iss triode; - Case 2: In reverse, Vx,Vy increases, M3,M4 triode.,45,Basic Concepts,In high-gain amplifiers, CMFB balances the PMOS and NMOS current mismatches, thus avoid driving one of them into triode region.Differential feedback can
32、not define CM levelIn simulation, CM may be well-defined around half VDD, yet in real world, random mismatches and device variations would degrade CM easily without CMFB.,46,Example 9.16,Consider the telescopic op amp below. Suppose M9 suffers from a 1% current mismatch with respect to M10, producin
33、g Iss = 2.97 mA rather than 3 mA. Assuming perfect matching for the others. Explain what happens in the circuit.Solution:Output voltage error: =3.99VVx, Vy must rise so much that M5, M6, M7, M8 go to triode,yielding ID7 = 1.485 mA.Current mismatch is largelydepended on different drain-source voltage
34、.,47,Conceptual topology,Measure output CM level;Compare with a reference;Apply the error to correct the level.,48,CM Sensing Techniques,Resistive sensing - large R1,R2 to avoid loading effect - large chip area and parasitic capacitance - reduce frequency performance Source follower sensing - lose o
35、ne Vth in swing - large R1, I1 to avoid “starved”,49,CM Sensing Techniques,Capacitive sensingSwitched-capacitorDeep triode sensing- Rtot vout1+vout2- Rtot has no relationshipwith differential voltage- may go to saturation region,50,Example 9.17,A student simulates the step response of a closed-loop
36、op amp circuit and observes the output waveforms shown in below. Explain why Vout1 and Vout2 do not change symmetrically.Solution:As evident from waveforms, the output CM levels change from t1 to t2, indicating CM sensing mechanism is nonlinear. For example, if M7 or M8 in last slide does not indeep
37、 triode at t2, the CM level would change because now it is a function of differential output.,51,CM Sensing Techniques,Differential pair sensing - by small signal analysis - Under Large swings situation, sensing is not valid due to large non-linearity.,52,CM Feedback Techniques,Control cascade curre
38、nt sourceControl tail current source,53,CM Feedback Techniques,Deep triode sensing feedback - Limited headroom - Large C - Device variationDeep triode folded-cascade sensing feedback,54,Example 9.18,Determine the sensitivity of Vout,CM to Vb, i.e, dVout,CM/dVb.Solution:CMFB small signal analysis Max
39、imize Vds7,8 for Sensitivity,55,CM Feedback Techniques,Modification of deep triode sensing feedbackThe output level is relatively independent of device parameters and lowers sensitivity of Vb,56,CM Feedback Techniques,Modification of deep triode sensing feedbackM17, M18 reproduces the drain of M15 a
40、 voltage equal to the source voltage of M1 and M2,57,CM Feedback Techniques,Another type of CM feedback topologyDiode-connected loads output CM level is well-definedDifferential small signal gainCommon-mode work as a diode-connectedLow supply voltage design,58,Example 9.19,Determine the maximum allo
41、wable output swings.Solution:Each output can fall to two overdrive voltages above ground if Vin,CM is chosen to place Iss at the edge of the triode region. The highest level allowed at the output is equal to the output CM level at P plus |Vth3,4| (by selecting suitable RF). Thus, output swing is VDD
42、-3Vov.(RF is small, not like previous setup),59,Example 9.20,Facing voltage headroom limitations, a student constructs the circuits below. Determine the small-signal gain from the input CM level to the output CM level.Solution: (A poor CMRR),60,CMFB in Two-Stage Op Amps,CMFB around second stage (not
43、 good) - May establish a current beyond nominal value CMFB from second stage to first stage - Global loop control of both stages,61,CMFB from Second to First Stage,CMFB from second stage to first stage limitation - 3 or 4 poles, which makes it difficult for the loop stable,62,CMFB at both Stages,All
44、 the drain currents are copied from IssThe differential voltage gain is equal to,63,Example 9.21,For the below design explain why the output CM level is inevitably well below VDD/2 and hence the output swings are limited. Devise a solution.Solution:The output CM is equal to VG7,8, which is only slig
45、htly greater than one threshold. The issue can be resolved by drawing a small current from node Q. It can be upwards to desired output and the device is still in saturation.,64,CMFB for Cascode First Stage,First stage use deep triode feedback loop to avoid loading.Achieving high gain while not preci
46、se,65,Input Range Limitations,Input common-mode level may need to vary over a wide range, e.g. ADC input comparator.Input swing limits the total range sometimes.In the below single-end unity-gain buffer the input CM minimal voltage is VGS1,2+VISS, which is one threshold greater than 2Vov in the outp
47、ut CM.,66,Extension of Input Range,Incorporate both NMOS and PMOS differential pair to keep a necessary transconductanceThe transconductance variation should be concernedGain, speed and noise may vary,67,Slew Rate,In a linear circuit, the slope of the step depends on final output value The observati
48、on applies to linear feedback system,68,Slew Rate,In a realistic case, with large input steps, the output displays a linear ramp having a constant slope. The slope of ramp is the “slew rate”.It seems that the maximum current to charge the load capacitance is limited. Nonlinear behavior. Reduce speed
49、 and increase distortion.Increase SR would consume power and wider device,69,Slew Rate Example,A small step rises Vout by and hence adjusts through R1, R2 negative feedback circuit.When M1 experiences a large step, M2 turns off. Thus, CL is charged by a constant current ISS.Feedback is broken but af
50、ter M2 turns on, the circuit returns to a linear operation.,70,Example 9.22,(a)Determine the small-signal step response of the circuit.(b)Calculate the positive and negative slew rates.Solution:,71,Slew Rate of Telescopic Op Amp,Each side appears a ramp with slope equal toThe total slew rate for Vou
