《笔记本上电时序详解工厂资料课件.ppt》由会员分享，可在线阅读，更多相关《笔记本上电时序详解工厂资料课件.ppt（66页珍藏版）》请在三一办公上搜索。
1、30-Sep,2003Charles YM ChenNB Product Engineering,S Note Power Sequence Presentation,S Note Block Diagram,S Note Power on Sequence,MAX1977,MAX1845,MAX1907,MAX1992,Fuse7A,FETPch,FETPch,FETNch,FETNch,DC-INConnector,DockingConnector,VINT16,Tsurumai,VCC3SW,VCCCPUCORE,FETNch,FETNch,LP3958,Fuse0.75A,FETPch
2、,VCC_FAN,VCC5B,VCC5M,USB_PWR1,USB_PWR2,MICVCC,VCC2R5A,FETNch,VCC3B,VCC3M,FETPch,VCC3AUX,VCC3P,Fuse2A,FETNch,VBL16,Fuse2A,VCCCPUIO,VCC1R5M,FETNch,FETNch,FETNch,VCC1R5B,VCC1R5AUX,FETNch,VCCGBEIOAUX,VCC1R8M,(Kenai2-32),For Ethernet Controller,PolySW1.5A,VDD15,H8,VCC1R25B,LP2996,MAX4245,VCCGMCHCORE,MAX1
3、845_VREF,MAX1683,FETNch,PolySW1.5A,MAX8880,VCCACPU,MAX1935,VCC1R8M,MAX1935,VCC3M,VCCGBECOREAUX,ICH4M,PMH4,CPU,PWRSWITCH#,PWRSW_H8#,PWRSW_H8#,Power Button,PWRSW#,ICH_SLP_S3#,ICH_SLP_S4#,ICH_SLP_S4#,ICH_SLP_S3#,PM_SLP_S3#,PM_SLP_S5#,VTT_PWRG,VTT_PWRG,VR_PWRGD,VR_PWRGD,PCIRST#,PWRBTN#,SLP_S3#,SLP_S4#,+
4、PWRON,B_ON,VCPU_CORE_ON,DDR_VREF,MPWRG,APWRG,BPWRG,PCIRST#,CC_CPUPWRGD,CC_CPUPWRGD,PWRGOOD,GTL_CPURST#,GTL_CPURST#,GTL_ADS#,MONTARA GM+,CPURST#,BPWRG,PWROK,IM VPOK,DOCK-PWR16_F,1,2,VREGIN16,2,3,4,4,4.1,4,4,5,5,6,6,6,6,7,7,7,7,7,8,8,8,9,5,5,10,10,10,10,11,11,11,11,11,12,12,13,14,15,16,17,18,19,MPWRG,
5、BPWRG,PWROK,RSMRST#,Power on seuqence table,Power on seuqence table,DOCK-PWR16_F&VREGIN 16,VCC3SW,VCC3M_ON&VCC5M_ON,Spec:VCC3M_ON(M_ON1)to VCC5M_ON(M_ON2)is 10ms20ms,VCC3M&VCC5M,VCC3M&VCC%M power by MAXIM 1977,VCC3M&VCC5M,VCC1R5M&VCC1R8M,VCC1R5M power by MAXIM 1845,VCC1R8M power by MAXIM 1935,VCC1R5
6、M&VCC1R8M,MPWRG,In the block of M_PGS,the voltage of VCC5M and VCC3M are monitored by the internal analog comparator respectively,each stateis supplied to M_PGS output.The terminal is Open drain structure.The operation of detection is started when both 5M_ON and 3M_ON are equal to High.The analog Co
7、mparator has hysteresisvoltage and generate high signal when the following condition are satisfied.Greater than 4.461V(Typ.)at power on stage of VCC5M（Rising Edge）and lower than 4.311V(Typ.)at the shut down stage(Falling edge)after 47.5ms+/-2.5msGreater than 2.943V(Typ.)at power on stage of VCC3M（Ri
8、sing Edge）and lower than 2.793V(Typ.)at the shut down stage(Falling edge)after 47.5ms+/-2.5msL output isVCC5M4.311V（Typ.），VCC3M2.793V（Typ.）,MPWRG,Spec:VCC3/5M Power to MPWRG is 47.5+/-5ms,ICH_SLP_S3#&ICH_SLP_S4#,Spec:Depend on ICH4M spec,the SLP_S4#and SLP_S3#should rise up after Power on.SLP_S3#to
9、SLP_S4#is 1 RTCCLK2RTCCLK.(1RTC clock is approximately 32 us.),VCC3AUX&VCCGBECOREAUX,VCC3AUX power by FDC658P,VCCGBECOREAUX power by MAXIM 1935,VCC3AUX&VCCGBECOREAUX,VCCGBEIOAUX&VCCGBEIOAUX_DRV,VCC1R5AUX&VCC1R5AUX_DRV,Press Power Button,Press Power Button,Press Power Button,+PWRON&B_ON&VCPU_CORE_ON,
10、Spec:From+PWRON to B_ON is 10ms20ms,VCC2R5A,VCC2R5A power by MAXIM 1845,VCC2R5A,DDR_VREF,VCC3B&VCC5B&VCCACPU,VCCGMCHCORE&MICVCC&VCCCPUIO,Core power of Motara-GM Plus power by MAXIM 4245,MICVCC power by LP4085,VCCGMCHCORE&MICVCC&VCCCPUIO,CPU I/O power by MAXIM 1992,VCCGMCHCORE&MICVCC&VCCCPUIO,VCC1R5B
11、&VCC1R5B_DRV,APWRG&BPWRG,In the block of A_PGS,the voltage of VCC3A is monitored by the internal analog comparator,each state is supplied to A_PGS output.The terminal is Open drain structure.The operation of detection is started when 3A_ON is equal to High.The analog Comparator has hysteresis voltag
12、e and generate highsignal when the following condition are satisfied.Greater than 2.943V(Typ.)at power on stage of VCC3A（Rising Edge）and lower than 2.793V(Typ.)at the shut down stage(Falling edge)In this period A_PGS is supplying H level.The Hysteresis Voltage are set 150mV+/-50mV.At the High state,
13、the delay time of 350ms+/-10ms is set.,APWRG,BPWRG,APWRG&BPWRG,In the block of B_PGS,the voltage of VCC5B and VCC3B are monitored by the internal analog comparator,each voltage state issupplied to B_PGS output.The terminal is Open drain structure.The operation of detection is started when both 5B_ON
14、 and 3B_ON are equal to High.The analog Comparator has hysteresisvoltage and generate high signal when the following condition are satisfied.Greater than 4.461V(Typ.)at power on stage of VCC5M（Rising Edge）and lower than 4.311V(Typ.)at the shut down stage(Falling edge)after 47.5ms+/-2.5msGreater than
15、 2.943V(Typ.)at power on stage of VCC3M（Rising Edge）and lower than 2.793V(Typ.)at the shut down stage(Falling edge)after 47.5ms+/-2.5msIn this period B_PGS is supplying H level.The Hysteresis Voltage are set 150mV+/-50mV.And at the High state,the delay time is set,when B_PGS become High,the delay ti
16、me of 100ms+/-5ms is set in case of A_PGS is equal to Low,and the delay time of 445ms+/-5ms is set in case of A_PGS is equal to High.,APWRG&BPWRG,BPWRG,APWRG&BPWRG,Spec:From APWRG to BPWRG is 100+/-5ms,VTT_PWRG,VCCCPUCORE&VR_PWRGD,VCCCPUCORE&VR_PWRGD by MAXIM 1907,VCCCPUCORE&VR_PWRGD,PCIRST#&CC_CPUP
17、WRGD,Spec:From BPWRG to PCIRST#is 1ms,GTL_CPURST#,Spec:From PCIRST#to GTL_CPURST#is 1ms,GTL_ADS#&LPC_FRAME#,P_TRDY#&P_IRDY#&P_FRAME#,S0 TO S3,S0 TO S3,S3 TO S0,S3 TO S0,S0 TO S3&S3 TO S0 POWER STATUS,VCC1R25B,S3 TO S0,S0 TO S3,VCC3B,S0 TO S3,S3 TO S0,S0 TO S3&S3 TO S0 POWER STATUS,VCC5B,S0 TO S3,S3
18、TO S0,S0 TO S3&S3 TO S0 POWER STATUS,S0 TO S3,S3 TO S0,S0 TO S3&S3 TO S0 POWER STATUS,VCCACPU,S0 TO S3,S3 TO S0,S0 TO S3&S3 TO S0 POWER STATUS,VCCCPUIO,S0 TO S3,S3 TO S0,S0 TO S3&S3 TO S0 POWER STATUS,VCCGMCHCORE,S0 TO S3,S3 TO S0,S0 TO S3&S3 TO S0 POWER STATUS,VCPU CORE ON,PWM POWER ON/OFF STATUS,M
19、AXIM 1977,PLUG IN ADT,SHUTDOWN THE SYSTEM,VCC3M,PWM POWER ON/OFF STATUS,MAXIM 1977,PLUG IN ADT,SHUTDOWN THE SYSTEM,VCC5M,PWM POWER ON/OFF STATUS,MAXIM 1845,PLUG IN ADT,SHUTDOWN THE SYSTEM,VCC1R5M,PWM POWER ON/OFF STATUS,MAXIM 1845,PRESS POWER BUTTON ON,SHUTDOWN THE SYSTEM,VCC2R5A,PWM POWER ON/OFF ST
20、ATUS,MAXIM 1907,PRESS POWER BUTTON ON,SHUTDOWN THE SYSTEM,VCCCPUCORE,PWM POWER ON/OFF STATUS,MAXIM 1992,PRESS POWER BUTTON ON,SHUTDOWN THE SYSTEM,VCCCPUIO,LDO POWER ON/OFF STATUS,LP2996,PRESS POWER BUTTON ON,SHUTDOWN THE SYSTEM,DDR_VREF&VCC1R25B,LDO POWER ON/OFF STATUS,MAXIM 1935,PLUG IN ADT,SHUTDOW
21、N THE SYSTEM,VCC1R8M,MAXIM 1935,PRESS POWER BUTTON ON,SHUTDOWN THE SYSTEM,VCCGBECOREAUX,LDO POWER ON/OFF STATUS,LDO POWER ON/OFF STATUS,MAXIM 1683,PLUG IN ADT,SHUTDOWN THE SYSTEM,VDD15,LDO POWER ON/OFF STATUS,TSURUMAI,PLUG IN ADT,PLUG OUT ADT,VCC3SW,LDO POWER ON/OFF STATUS,MAXIM 8880,PRESS POWER BUTTON ON,VCCACPU,SHUTDOWN THE SYSTEM,LDO POWER ON/OFF STATUS,MAXIM 4245,PRESS POWER BUTTON ON,VCCGMCHCORE,SHUTDOWN THE SYSTEM,
