《NIOS参与cyc版原理图.ppt》由会员分享，可在线阅读，更多相关《NIOS参与cyc版原理图.ppt（29页珍藏版）》请在三一办公上搜索。
1、5,4,3,2,1,DCBA,Nios Development BoardCyclone EditionRev 01Altera Corporation110 Cooper Street,Suite 201TitleNios Dev Board,Cyclone Edition,DCBA,SizeA,Document NumberP06-08713-00,Rev01,5,4,3,Date:,Thursday,February 20,20032,Sheet,1,1,of,29,cpld_CLKOSC,DCLK,CONFIG_n,CONFIG_DONE,STATUS_n,INIT_DONE,pld_
2、RECONFIGREQ_n,enet_RESET,proto1_RESET_n,proto2_RESET_n,flash_RESET_n,pld_CE_n,enet_VLBUS_n,user_PB3:0,user_PB3:0,flash_CS_n,fse_A22:0,fse_D7:0,flash_RY_BY_n,flash_OE_n,flash_RW_n,MASTER_RESET_n,pld_MSEL0,pld_MSEL1,pld_DATA0,pld_ASDO,pld_CS_n,RESET_n,cpld_CLKOSC,DCLK,CONFIG_n,CONFIG_DONE,STATUS_n,INI
3、T_DONE,pld_RECONFIGREQ_n,enet_RESET,MASTER_RESET_n,flash_RY_BY_n,flash_OE_n,flash_RW_n,MASTER_RESET_n,proto1_RESET_n,proto2_RESET_n,flash_RESET_n,flash_CS_n,fse_A22:0,fse_D7:0,pld_MSEL0,pld_MSEL1,pld_DATA0,pld_ASDO,pld_CS_n,pld_CE_n,enet_VLBUS_n,user_PB3:0,user_PB3:0,pld_RECONFIGREQ_n,DCLK,CONFIG_n,
4、CONFIG_DONE,STATUS_n,INIT_DONE,pld_MSEL0,pld_MSEL1,pld_DATA0,pld_ASDO,pld_CS_n,pld_RECONFIGREQ_n,DCLK,CONFIG_n,CONFIG_DONE,STATUS_n,INIT_DONE,cf_PRESENT_n,cf_ATASEL_n,cf_POWER,user_PB3:0,cf_PRESENT_n,cf_ATASEL_n,cf_POWER,user_PB3:0,pld_CE_n,pld_DATA0,pld_ASDO,pld_CS_n,pld_MSEL0,pld_MSEL1,pld_CE_n,he
5、x_0A,hex_0B,hex_0C,hex_0D,hex_0E,hex_0F,hex_0G,hex_0DP,hex_1A,hex_1B,hex_1C,hex_1D,hex_1E,hex_1F,hex_1G,hex_1DP,LEDG7:0,hex_0A,hex_0B,hex_0C,hex_0D,hex_0E,hex_0F,hex_0G,hex_0DP,hex_1A,hex_1B,hex_1C,hex_1D,hex_1E,hex_1F,hex_1G,hex_1DP,LEDG7:0,LEDG7:0,D,D,C,C,B,B,5,Page 16-19,4Page 29,Page 4,3,Configu
6、ration PLD,2,1,Top Level HierarchySwitches_ButtonsPower,Page 5,Ethernet,enet_D31:0enet_A15:1enet_BE_n3:0enet_AENenet_IOR_nenet_IOW _nenet_ADS_nenet_INTRQ0enet_LDEV_nenet_IOCHRDYRESETenet_LCLKenet_DATACS_nenet_W _R_nenet_CYCLE_nenet_RDYRTN_nenet_SRDY_nenet_VLBUS_nPage 20-23Protocard 1,fse_D31:0fse_A1
7、5:1enet_BE_n3:0enet_AENenet_IOR_nenet_IOW _nenet_ADS_nenet_INTRQ0enet_LDEV_nenet_IOCHRDYenet_RESETenet_LCLKenet_DATACS_nenet_W _R_nenet_CYCLE_nenet_RDYRTN_nenet_SRDY_nenet_VLBUS_n,mictor_CLKTCKTMSTDOTDITR_CLKMICTOR24:0,Page 9 Mictor Connectormictor_CLKTCKTMSTDOTDITR_CLKMICTOR24:0,Page 27,proto_IO40:
8、0CARDSEL_nRESET_nOSCCLKINCLKOUTcf_CS_ncf_PRESENT_ncf_ATASEL_ncf_POW ERSerial PortDTR1RTS1RXD1DSR1DCD1CTS1TXD1RI1RXD2TXD2,proto1_IO40:0proto1_CARDSEL_nproto1_RESET_nproto1_OSCproto1_CLKINproto1_CLKOUTcf_CS_ncf_PRESENT_ncf_ATASEL_ncf_POW ERDTR1RTS1RXD1DSR1DCD1CTS1TXD1RI1RXD2TXD2,enet_BE_n3:0enet_AENen
9、et_IOR_nenet_IOW _nenet_IOCHRDYenet_ADS_nenet_LDEV_nenet_INTRQ0enet_LCLKenet_DATACS_nenet_W _R_nenet_CYCLE_nenet_RDYRTN_nenet_SRDY_nproto1_IO40:0proto1_CARDSEL_nproto1_CLKOUTcf_CS_n,Page 10-15enet_BE_n3:0enet_AENenet_IOR_nenet_IOW _nenet_IOCHRDYenet_ADS_nenet_LDEV_nenet_INTRQ0enet_LCLKenet_DATACS_ne
10、net_W _R_nenet_CYCLE_nenet_RDYRTN_nenet_SRDY_nproto1_IO40:0proto1_CARDSEL_nproto1_CLKOUTcf_CS_n,PLD,sdram_CLKTCKTMSTDOTDITR_CLKMICTOR24:0pld_CLKFBCLOCKINPUT1pld_CLKOUTsram_BE_n3:0sram_OE_nsram_W E_nsram_CS_n,sdram_CLKTCKTMSTDOTDITR_CLKMICTOR24:0pld_CLKFBpld_CLOCKINPUT1pld_CLKOUTsram_BE_n3:0sram_OE_n
11、sram_W E_nsram_CS_n,pld_CLOCKINPUT1proto1_OSCproto2_OSCcpld_CLKOSCpld_CLKOUTmictor_CLKproto1_CLKINproto2_CLKINpld_CLKFBfse_A19:2fse_D31:0sram_BE_n3:0sram_OE_nsram_W E_nsram_CS_n,Page 3 Clocksosc_CLK0osc_CLK1osc_CLK2osc_CLK3pld_CLKOUTpld_CLK0pld_CLK1pld_CLK2pld_CLK3Page 28A19:2D31:0sram_BE_n3:0sram_O
12、E_nsram_W E_nsram_CS_n,SRAM,Page 24,25,Protocard 2proto_IO40:0CARDSEL_nRESET_nOSCCLKINCLKOUT,proto2_IO40:0proto2_CARDSEL_nproto2_RESET_nproto2_OSCproto2_CLKINproto2_CLKOUT,DTR1RTS1RXD1DSR1DCD1CTS1TXD1RI1RXD2TXD2proto2_IO40:0proto2_CARDSEL_nproto2_CLKOUT,DTR1RTS1RXD1DSR1DCD1CTS1TXD1RI1RXD2TXD2proto2_
13、IO40:0proto2_CARDSEL_nproto2_CLKOUT,fse_D31:0fse_A22:0flash_OE_nflash_RW _nflash_RY_BY_nflash_CS_nsdram_DQ31:0sdram_A11:0sdram_DQM3:0sdram_BA1:0sdram_W E_nsdram_RAS_nsdram_CAS_nsdram_CS_nsdram_CKE,fse_D31:0fse_A22:0flash_OE_nflash_RW _nflash_RY_BY_nflash_CS_nsdram_DQ31:0sdram_A11:0sdram_DQM3:0sdram_
14、BA1:0sdram_W E_nsdram_RAS_nsdram_CAS_nsdram_CS_nsdram_CKE,fse_A22:0fse_D7:0flash_OE_nflash_RW _nflash_RY_BY_nflash_CS_nflash_RESET_n,Page 6A22:0D7:0flash_OE_nflash_RW _nflash_RY_BY_nflash_CS_nRESET_nPage 26,FlashSDRAM,sdram_DQ31:0sdram_A11:0sdram_DQM3:0sdram_BA1:0sdram_W E_nsdram_RAS_nsdram_CAS_nsdr
15、am_CS_nsdram_CLKsdram_CKE,sdram_DQ31:0sdram_A11:0sdram_DQM3:0sdram_BA1:0sdram_W E_nsdram_RAS_nsdram_CAS_nsdram_CS_nsdram_CLKsdram_CKE,A,Page 7,8,Leds,Altera Corporation110 Cooper Street,Suite 201TitleNios Dev Board,Cyclone Edition,A,Size,Document Number,Rev,CustomP06-08713-00,01,5,4,3,2,Date:,Thursd
16、ay,April 17,2003,Sheet1,2,of,29,J4,1,5,4,3,2,1,ClocksVCC5,D,L1,D,1,47nH,2,XY2,C23,C24,C25,OcilatorHalf,RP1,33,C,0u1,0u001,0u1,84,Y2VCC OUTGND OE_n50Mhz,SocketOSC_Socket51,139101211,U2MON_nOEA_nINAOEB_nINB,OA0OA1OA2OA3OA4OB0OB1OB2OB3OB4,234671918171514,4321RP72 335678,56784321,osc_CLK3osc_CLK1osc_CLK
17、2osc_CLK0pld_CLK0pld_CLK1pld_CLK2pld_CLK3,C,Do not Stuff R13for Ocilator,R13330,49FCT3805,operation.StuffR13 when usingClock input.pld_CLKOUTSMAREC,B,Do not Stuff R15for Ocilator,R1549R9,B,operation.StuffR15 when usingClock input.Altera Corporation,A,110 Cooper Street,Suite 201TitleNios Dev Board,Cy
18、clone Edition,A,SizeA,Document NumberP06-08713-00,Rev01,5,4,3,Date:,Thursday,February 20,20032,Sheet,3,1,of,29,91,39,GNDINT,GNDINT,82,66,51,34,18,3,GNDIO,GNDIO,GNDIO,GNDIO,GNDIO,GNDIO,VCCINT,VCCINT,VCCIO,VCCIO,VCCIO,VCCIO,VCCIO,VCCIO,4,3,2,1,5,6,7,8,38,86,95,74,59,43,26,11,1,2,6,5,3,8,7,4,5K6,2,4,C,
19、1,3,5,7,9,C,B,B,5,4,3,2,1,Configuration PLD,D,user_PB3:0,user_PB3:0,pld_USERLED,LED1LedG,R199 200,D,fse_D7:0,fse_D7:0,U59,VCC3_3,pld_FACTORYLED,LED2,R200 200,fse_A22:0,fse_A22:0,VCC3_3,pld_CS_npld_DATA0pld_ASDO,pld_CS_npld_DATA0DCLKpld_ASDO,CS_nDATADCLKASDI,VCCVCCVCCGND,pld_LOADLED,LedYLED3LedG,R201
20、 200,EPCS4,LED4,U3,pld_ERRLEDVCC3_3,LedRLED5,R42,200,flash_OE_n,fse_A0fse_A1fse_A2fse_A3fse_A4fse_A5fse_A6fse_A7fse_A8fse_A9fse_A10fse_A11fse_A12fse_A13fse_A14fse_A15fse_A16fse_A17fse_A18fse_A19fse_A20fse_A21fse_A22flash_OE_n,12567891012131416171920212223242527282930,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO
21、IOIOIOIOIOIOIOIO,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO,525354555657586061636465676869707172757677787980,enet_RESETpld_CS_nproto1_RESET_nproto2_RESET_npld_ASDOflash_RESET_npld_DATA0pld_MSEL0pld_MSEL1pld_USERLEDpld_FACTORYLEDpld_LOADLEDpld_ERRLEDfse_D0fse_D1fse_D2fse_D3fse_D4fse_D5fse_D6fse
22、_D7,enet_RESETproto1_RESET_nproto2_RESET_nflash_RESET_npld_MSEL0pld_MSEL1,CONFIG_DONECONFIG_n,J281 23 45 67 89 102x5Header,246810,VCC3_3,pld_CE_npld_CS_n,R43 200LedGpower indicationpld_CE_nVCC3_3R176SW 91 3pld_BOOTSELPBswitchpld_BOOTSEL determines,flash_RW _nflash_CS_nflash_RY_BY_n,flash_RW _nflash_
23、CS_nflash_RY_BY_nuser_PB0user_PB1user_PB2user_PB3,3132333536374041,IOIOIOIOIOIOIOIO,IOIOIOIOIOIOIOIO,8183848592939496,CONFIG_DONESTATUS_npld_RECONFIGREQ_npld_BOOTSEL,CONFIG_DONESTATUS_npld_RECONFIGREQ_n,VCC3_3,male header JTAGconnections:pin#jtag1 TCK,whether to forcea boot from the defaultboot sect
24、or,or theuser-programmed bootsector.,enet_VLBUS_n,enet_VLBUS_nTCKTMSTDI,424445464748495062154,IOIOIOIOIOIOIOIOTCKTMSTDI,IOIOIOIOGCLK1GCLR_nOE1OE2TDO,9798991008789889073,DCLKCONFIG_nINIT_DONEcpld_CLKOSCMASTER_RESET_nTDO,DCLKCONFIG_nINIT_DONEcpld_CLKOSCMASTER_RESET_n,RP31K,2345678910,GNDTDOVccTMSVccio
25、(NC)(NC)TDIGNDVCC3_3,pld_RECONFIGREQ_n R106,VCC3_35K6,J5,A,EPM7128,TCKTDOTMSTDI,13579,13579,246810,246810,TRST,Altera Corporation110 Cooper Street,Suite 201,A,2x5Header,Title,Nios Dev Board,Cyclone Edition,SizeB,Document NumberP06-08713-00,Rev01,5,4,3,2,Date:,Thursday,February 20,2003,Sheet1,4,of,29
26、,11,16,14,16,SMNT1,MNT0,1,33,44,62,77,98,110,120,AVDD,AVDD,VDD,VDD,VDD,VDD,VDD,VDD,VDD,VDD,PHY,SMNT0,MNT1,13,MIIINTERFACE,15,SERIAL,EEPROM,AVSS,AVSS,VSS,VSS,VSS,VSS,VSS,VSS,VSS,VSS,VSS,VSS,INTERFACEPINS,24,39,52,57,67,72,93,103,108,117,13,19,12,8,7,3 11,1,2,TCT,5,10,6,4,9,D,C,B,D,C,B,2,5,VCC3_3,4,3,
27、VCC3_3,VCC3_3,2,1,Stuff R155 R156 R157 R158R159 and R160 only when usingthe MAC Phy instead of the,C26,Ethernet,Phy,and resistors R149 R150R151 R152 R153 and R154 are,0u01,C27,VCC3_3,nostuffed.,R22,R23,R24,R25,0u001,RJ1,enet_AEN,enet_BE_n3enet_BE_n2enet_BE_n1enet_BE_n0enet_AENenet_A1enet_A2enet_A3en
28、et_A4enet_A5enet_A6enet_A7enet_A8enet_A9enet_A10enet_A11enet_A12enet_A13enet_A14enet_A15enet_D0enet_D1enet_D2enet_D3enet_D4enet_D5enet_D6enet_D7enet_D8enet_D9enet_D10enet_D11enet_D12enet_D13enet_D14enet_D15enet_D16enet_D17enet_D18enet_D19enet_D20enet_D21enet_D22enet_D23enet_D24enet_D25enet_D26enet_D
29、27enet_D28enet_D29enet_D30enet_D31,979695944178798081828384858687888990919210710610510410210110099767574737170696866656463616059585655545351504948,U4BE3#BE2#BE1#BE0#AENA1A2A3A4A5A6A7A8A9A10A11A12A13A14A15D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15D16D17D18D19D20D21D22D23D24D25D26D27D28D29D30D31,LAN91C111
30、,TPO+TPO-TPI+TPI-LNK#LBKCNTRL#RBIASLEDA#LEDB#RXD3RXD2RXD1RXD0TXD3TXD2TXD1TXD0TXEN100CRS100COL100RXDVRXERMDIMDOMCLKRX25TX25IOS0IOS1IOS2ENEEPENDOENDIEESKEECS,14151718202128122223121122123124113114115116111119112125126252627118109345678910,RBIAS,LEDLNK_nLEDRX_nR2811KENEEP,24R9 24R9,49R9 49R9R26 24R9R27
31、 24R9VCCAC350u001,TXDPTXDMRXDPRXDMC280u1C360u001,C290u001VCC3_3C370u1,L21,VCCA47nHC380u1,2C390u1,LEDRX_nD4OCTNC0TDN D3TDPLEDLNK_nRCT D2RDNRDPD1RJ45INTLEDVCC3_3VCC3_3C30 C31 C32 C33 C341u 0u001 0u001 0u1 0u1PULL-UP/PULL-DOWNSVCC3_3R29 R3010K 10Kenet_IOR_nenet_IOW _nENEEP,RESETenet_ADS_nenet_LCLKenet_
32、IOCHRDYenet_RDYRTN_nenet_SRDY_nenet_INTRQ0enet_LDEV_nenet_IOR_nenet_IOW _nenet_DATACS_nenet_CYCLE_nenet_W _R_nenet_VLBUS_n,RESETenet_ADS_nenet_LCLKenet_IOCHRDYenet_RDYRTN_nenet_SRDY_nenet_INTRQ0enet_LDEV_nenet_IOR_nenet_IOW _nenet_DATACS_nenet_CYCLE_nenet_W _R_nenet_VLBUS_n,3037423846432945313234353
33、640,RESETADS#LCLKARDYRDYRTN#SRDY#INTR0LDEV#RD#W R#DATACS#CYCLE#W/R#VLBUS#,XTAL2XTAL1CSOUT#X25OUT,128127247,C4033p,Y3125MHz,C4133p,C420u001,C430u001,VCC3_3C440u001,C450u1,C460u1,R136330,A,LAN91C111,Altera Corporation,A,enet_D31:0,enet_D31:0,110 Cooper Street,Suite 201,enet_A15:1,enet_A15:1,Title,Nios
34、 Dev Board,Cyclone Edition,enet_BE_n3:0,enet_BE_n3:0,SizeB,Document NumberP06-08713-00,Rev01,5,4,3,2,Date:,Thursday,February 20,2003,Sheet1,5,of,29,5,4,3,2,1,Flash,D,U5,A22:0D7:0,A22:0D7:0,D,C,flash_OE_nflash_CS_nflash_RW _nRESET_nflash_RY_BY_n,A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A2
35、1A22flash_OE_nflash_CS_nflash_RW _nRESET_nR39 1Kflash_RY_BY_n,27222120191817161094287654346154344352302811121314,A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22OE_nCE_nW E_nRESET_nACCRY/BY_n,D0D1D2D3D4D5D6D7NCNCNCNCNCNCNC,31323334383940411232425264748,D0D1D2D3D4D5D6D7,C,AM29LV065DVCC3_3,
36、B,B,flash_CS_nflash_RW _n,R194R195,5K65K6,Flash chip is 8M x 8 for8Mbytes of flash,A,Altera Corporation110 Cooper Street,Suite 201TitleNios Dev Board,Cyclone Edition,A,Size,Document Number,Rev,CustomP06-08713-00,01,5,4,3,2,Date:,Thursday,February 20,2003,Sheet1,6,of,29,1,2,3,4,6,5,4,3,2,1,Hex Displa
37、yU8,D,RP5,220,10 A,D,hex_0Ahex_0Bhex_0Chex_0D,hex_0Ahex_0Bhex_0Chex_0D,1234,8765,9 B8 C5 D,VCC3_3,1,hex_0Ehex_0Fhex_0Ghex_0DP,hex_0Ehex_0Fhex_0Ghex_0DP,1234,RP6,8765,4 E2 F3 G7 DP,6,220,7Segment Display,C,hex_1Ahex_1Bhex_1Chex_1D,hex_1Ahex_1Bhex_1Chex_1D,5678,RP7,4321,U910 A9 B8 C,VCC3_3,C,5 D,220,1
38、,hex_1Ehex_1Fhex_1Ghex_1DP,hex_1Ehex_1Fhex_1Ghex_1DP,RP8 2208765,4 E2 F3 G,7 DP,BA,7Segment DisplayAltera Corporation110 Cooper Street,Suite 201TitleNios Dev Board,Cyclone Edition,BA,SizeA,Document NumberP06-08713-00,Rev01,5,4,3,Date:,Thursday,February 20,20032,Sheet,7,1,of,29,5,4,3,2,1,LedsD0,D,RP1
39、1,LedGD1,D,LEDG0LEDG1LEDG2LEDG3,4321,5678,LedGD2,LedG100D3LedG,C,RP13 100,D4LedGD5,C,LEDG4LEDG5LEDG6LEDG7,4321,5678,LedGD6,LedGD7,B,LedG,LEDG7:0Altera Corporation,LEDG7:0,B,A,110 Cooper Street,Suite 201TitleNios Dev Board,Cyclone Edition,A,SizeA,Document NumberP06-08713-00,Rev01,5,4,3,Date:,Thursday
40、,February 20,20032,Sheet,8,1,of,29,44,TOOL,VCC3_3R207,J25,VCC3_3,TDOTCKTMSTDI,5K6mictor_CLKTDO R179 0_jumpTCK R180 0_jumpTMS R181 0_jumpTDI R182 0_jumpVCC3_3R183 5K6Do not stuff R179,R180,R181,R182,or R183 uless using theFS2 attachment to program the,mictor_CLKMICTOR24MICTOR23MICTOR22mictor_TRSTMICT
41、OR21MICTOR20MICTOR19MICTOR18MICTOR17MICTOR16MICTOR15MICTOR14,135791113151719212325272931333537,135791113151719212325272931333537,2468101214161820222426283032343638,2468101214161820222426283032343638,TR_CLKMICTOR13MICTOR12MICTOR11MICTOR10MICTOR9MICTOR8MICTOR7MICTOR6MICTOR5MICTOR4MICTOR3MICTOR2MICTOR1
42、MICTOR0,TR_CLK,stratix device.Mictor38P,MICTOR24:0,MICTOR24:0Altera Corporation110 Cooper Street,Suite 201TitleNios Dev Board,Cyclone Edition,SizeA,Document NumberP06-08713-00,Rev01,Date:,Thursday,February 20,2003,Sheet,9,of,29,B,B,5,4,3,2,1,PLD Bank 1,D,fse_A22:0U60A,fse_A22:0,D,fse_A6fse_A7fse_A8f
43、se_A9fse_A10fse_A11fse_A12fse_A13,C2D2D4D1E4E5F3E3,IOIOIOIOIOIOIOIO,IOIOIOIOIOIOIOIO,V2V3U3U2U4U1T3T2,sdram_DQ31sdram_DQ30sdram_DQ29sdram_DQ28sdram_DQ27sdram_DQ26sdram_DQ25sdram_DQ24,C,sdram_CS_nsdram_CKEsdram_CAS_nsdram_W E_nsdram_RAS_n,fse_A14fse_A15fse_A16fse_A17fse_A18fse_A19fse_A20fse_A21fse_A2
44、2sdram_CS_nsdram_CKEsdram_CAS_nsdram_W E_nsdram_BA0sdram_BA1sdram_RAS_n,E2F4F5F2F1F6G5G1G2G6G7G3G4H7H1H2,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO,BANK 1,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO,T4R4R3R5R6R2R1P4P3P5P6P1P2P7N7N5,sdram_DQ23sdram_DQ22sdram_DQ21sdram_DQ20sdram_DQ19sdram_DQ18sdram_DQ17sdram_DQ16sdram_DQ1
45、5sdram_DQ14sdram_DQ13sdram_DQ12sdram_DQ11sdram_DQ10sdram_DQ9sdram_DQ8,C,sdram_DQM3sdram_DQM2sdram_DQM1sdram_DQM0sdram_A11sdram_A10sdram_A9sdram_A8sdram_A7sdram_A6sdram_A5sdram_A4sdram_A3sdram_A2sdram_A1sdram_A0,H3H4J1J2H5H6J3J4J5J6J7J8M4M6M1M2,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO,IOIOIOIOIOIOIOIOIO.ASDO
46、IO.INIT_DONEIO.CLKUSRIO.CSO_nIO.PLL1_OUT0pIO.PLL1_OUT0n,N3N4N2N1N6M7M3M5L4C3D3K2L8M8,sdram_DQ7sdram_DQ6sdram_DQ5sdram_DQ4sdram_DQ3sdram_DQ2sdram_DQ1sdram_DQ0pld_ASDOINIT_DONEenet_LDEV_npld_CS_nR213 33enet_SRDY_n,pld_ASDOINIT_DONEenet_LDEV_npld_CS_npld_CLKOUTenet_SRDY_n,pld_CLKOUT,EP1C20_400FBGA,A,sd
47、ram_BA1:0sdram_DQ31:0sdram_A11:0sdram_DQM3:0Altera Corporation110 Cooper Street,Suite 201TitleNios Dev Board,Cyclone Edition,sdram_BA1:0sdram_DQ31:0sdram_A11:0sdram_DQM3:0,A,SizeB,Document NumberP06-08713-00,Rev01,5,4,3,2,Date:,Thursday,February 20,2003,Sheet1,10,of,29,C,C,B,B,5,4,3,2,1,PLD Bank 2,D
48、,U60B,fse_A22:0,fse_A22:0,D,enet_LCLKenet_RDYRTN_nenet_CYCLE_nenet_W _R_nenet_DATACS_nenet_INTRQ0enet_AENenet_IOR_nenet_IOW _nenet_IOCHRDYenet_ADS_n,enet_LCLKenet_RDYRTN_nenet_CYCLE_nenet_W _R_nenet_BE_n0enet_BE_n1enet_BE_n2enet_BE_n3enet_DATACS_nenet_INTRQ0enet_AENenet_IOR_nenet_IOW _nenet_IOCHRDYe
49、net_ADS_nLEDG7,C17B18B17A17C16B16D16E16C15D15B15A15E15F14A14B14,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO,BANK 2,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO,B4A4D5D6C5B5C6E6B6A6F7E7B7A7D7C7,fse_A0fse_A1fse_A2fse_A3fse_A4fse_A5fse_D0fse_D1fse_D2fse_D3fse_D4fse_D5fse_D6fse_D7fse_D8fse_D9,LEDG7:0,LEDG7:0,TXD2cf_PRESENT_nR
50、XD2cf_ATASEL_nflash_CS_nflash_OE_nflash_RW _nflash_RY_BY_n,LEDG0LEDG1LEDG2LEDG3TXD2cf_PRESENT_nRXD2cf_ATASEL_nLEDG4LEDG5flash_CS_nflash_OE_nflash_RW _nflash_RY_BY_nfse_D31fse_D30,E14E13C14D14A13B13C13D13E12F12A12B12D12C12E11A11,IOIOIOIOIOIOIOIOIOIOIOIOIOIOIOIO,IOIOIOIOIOIOIOIOIOIOIOIOIOIO,F8E8B8A8D8
