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1、毕业设计（论文）基于单片机的防盗报警器的设计(英文翻译) 本科生毕业设计（翻译）专 业： 电子信息工程 学 生： 指导教师： 完成日期： 72013年03月 日 多功能智能无线报警系统摘要： 利用内部资源丰富的FPGA（现场可编程门阵列），设计了一个无线报警发送系统。它包括编码器，FSK（频移键控）调制和每个通道的控制电路，它可以减小报警系统的体积同时提高其可靠性，解调接收系统的实现基于一个应用特定程序的集成电路MC3372。在一个单片机89C51的帮助下，地址解码器也设计在接收器中。添加其他反干扰功能，有效地降低报警系统的错误警报率。 该系统可以安装多达128个通道的发送设备。有某些情况下，
2、在有突发情况时，它可以发送报警信号至主机，系统会循环显示多个突发情况所在的区域代码。传输距离是大于4公里的开阔地带。用户可以同时安装多个类型的传感器，例如，烟雾传感器，可燃气体传感器或防盗传感器。实验表明，无线报警系统具有高可靠性，高抗干扰能力和低错误警报率的优势。它可以完全满足对防火防盗需要。关键词：通讯；报警系统；频移键控；微控制器；现场可编程门阵列 一、前言 无线报警系统与有线警报系统相比，具有隐蔽性和易于安装的特点。它在复杂的地形地貌情况之间的长距离传输时特别有效。由 FPGA（现场可编程门阵列）组成，其编码模块在发送系统创建地址信号，FSK（频移键控）调制信号及每个通道的控制器信号。
3、用FPGA取代MSI / SSI（中等规模的综合或小规模的综合）数字电路设备，不仅提高报警系统的可靠性和干扰阻力，同时也降低了它的体积，使系统更易于安装。由于使用7位二进制数表示地址，最多可以安装为128个收发通道。解码器由ASIC（特定用途集成电路）和SCM（单芯片微机）在无线报警接收机系统，它可以有效地降低错误警报率。二、发送系统原理 每个基站安装一个无线发送系统，并与一个7位二进制地址标识符相对应。 一旦在任何一个基站中传感器检测到突发情况，该区域的控制信号发送至编码电路，通过编码再接入该区域的7位地址标识的接口电路，转换成FSK信号。将 FSK信号传输到一个频率调制电路进行频率调制。再
4、经过功率放大后，经调频后通过天线发出的电磁波发送。发送系统的一个特点是不连续的发送。换句话说，发送系统在没有突发情况时不发送信号，当有报警的情况时会持续发送，以便有机会为其他基站发送信号。编码和控制电路配置 编码电路数字电路部分由包括8个模块的FPGA芯片构成。利用D触发器组成，模块dff1是检测器和编码器之间的接口。 振荡器模块与一些外部的电阻器和电容器相结合，形成一个可控低频多谐振荡器。其控制信号是dff1输出Q1。当Q1等于0时，它不会产生振动，如果Q1等于1，它通过振动产生低频方波。如果某些情况下在该区域出现，振荡器控制模块sender发送间断的电磁波。模块circular_shift
5、_r是并行输入串行输出桶形移位寄存器。A0?A7 Q8是地址码的串行输出端。模块dff2是一个由JK触发器组成控制电路。其安装信号是Q1，也用于延迟后的触发信号。 Q2作为the circular_shift_r模块的并行输入、串行输出控制终端。当Q2在高电压幅值时，circular_shift_r执行并行输入。当Q2在低电压幅值时，circular_shift_r执行串行输出。模块delay1是一个由D触发器组成的延时电路。模块division是一个输出三种不同频率信号的频率分离装置，其中有两个分支，作为FSK调制信号的频率划分为：f1和f2。其他分支作为模块dff1和delay1的一个触发
6、脉冲，也作为circular_shift_r时钟脉冲的串行输出。模块MUX是一个2-1的多路转换器。其控制信号由circular_shift_r的Q8输出。当 Q8 0时，MUX产生信号f2，当Q8 1时，产生信号f1。模块delay2与一些外部的电阻器和电容器相连组成一个延时电路。它的功能是在安装系统后给操作人员离开的时间。不管是否K1（探测器）是开启或关闭，发送电路在延迟时间内都不会工作。 以下所示，报警系统的工作原理如下：发送系统的电源开启时，输入dff1处于低电平。然后其输出端Q1的逻辑值为0，NQ1的逻辑值为1，此时作为指示电源一个外部的发光二极管（LED）点亮。信号Q1发送至dff
7、2的设置终端并使Q2的设置终端在高电平。高电平Q2将设置circular_shift_r进入并行输入地址代码模式。此时，外部晶体管N2处在饱和状态并且N3处在断开状态。这使得发送电路处于被控状态，因此，电路将无法正常工作。因此，如果没有突发情况时，电路将不发射载波信号，并且电路处在低功耗状态。一旦某些情况发生时，开关K1将启动。 dff1的终端D将立即跳转至转高电平，dff1的输出Q1设置在时钟脉冲的上升沿时为高电平。 使dff2的设置终端S为高电平。 此时dff2现在处在正常工作的状态。经过模块delay1延时后，Q1脉冲的上升沿会触发dff2输出低电压，这将使晶体管N2关闭，N3打开，延时
8、模块的常开触点将被关闭。此时上电的发送电路启动，电路开始正常工作。同时，如果Q2的逻辑值为0，circular_shift_r将切换至串行移位状态并且输出地址信号。当地址代码为0时，则MUX的输出为f2。当地址代码为1时，输出将是f1。终端f2和f1作为载波调制的调制信号。在这种方式中，地址代码在低频振荡器的第一个周期被发送。在第二个周期，它停止发送，为了给其他基站一段时间发送。在第三个周期后，重复上述步骤操作。 通过以上的讨论，我们得出的结论是：编码电路和控制电路的展示的功能如下：当电源接通时，操作人员人离开现场的时间延迟，在等待的情况下的低功耗模式，不连续发送和FSK调制等，比许多编码器A
9、SIC具有更多的功能且更加灵活。三、接收系统的配置和原理 一套无线接收器设置在警卫室，负责监测所有基站领域。无线接收器的原理如下所示。收到的调制信号经由低通滤波器后，送入高频共射，共基极放大器配置为放大状态。然后通过双调谐电路将信号发送至中频调制放大器，即混合发送到ASIC芯片（MC3372）的输入端（16引脚）。本地振荡电路的振荡频率为455 kHz时比接收到的信号更高。作为芯片MC3372的第一管脚，此信号与外部信号混合将得到455 kHz时的中频信号。过滤后，中频信号首先传送到MC3372的第八引脚做频率检测，然后由内部芯片MC3372的低频放大器放大，然后第九引脚输出基带信号。由低频率
10、的单晶体管放大，基带信号由两个施密特门（CD4584）转换成FSK信号，将被发送进MCS（主控装置3.0引脚进行解码。 在这个系统中的MCS是芯片89C51，其中加入一个12MHz外部晶体振荡器。其定时器T1作为模式2的波特率发生器，并且SMOD 1300波特/秒。选择串口模式1，这意味着在一个异步通信模式下，每帧10位，其中8位数据位的低7位是地址代码，并且第8位作为奇偶校验位。该系统采用的是偶校验。 当接收到一个地址码，MCS首先进行校验。 那么，如果它是正确的，MCS比较其数值，并输出7位地址码，并存储到内存中的数据缓冲区。这些步骤重复3次，以确定3个地址码。如果3个地址码是相同的，MC
11、S将确认接收地址信号，这是一种有效的报警信号，也就是说，地址码不是一个噪声信号。然后触发报警电路发出报警声。与此同时，代码号将显示在LED指示那个基站触发报警。 LED采用了动态扫描的显示方法。如果有一个以上的基站区域有突发情况时，MCS将每隔3秒显示它们的代码数。报警音频处理电路采用了NE556双时基集成电路芯片，形成一个双音频多谐振荡器，它会发出报警声振铃。系统可以配置传感器用于火灾报警，可燃气体报警和防盗报警。四、抗干扰措施重要的是要提高无线通信的抗干扰能力。在硬件中采取抗干扰措施。例如，要合理安排印刷电路板（PCB），提高了电源去耦，并合理放置高频和低频滤波器。由于接收系统包括高频电路
12、，独立的模拟电路和数字电路芯片，各有各的部分。为了防范内部和外部干涉或高频辐射，在一个金属屏蔽盒放置高频放大器和中频放大器通道并且将MCS系统放置在另一个金属屏蔽盒。采用FSK调制方式，双调谐选频和ASIC解调。所有这些措施，可以有效地减少系统受到的干扰。对于软件部分，采用模块化结构设计的软件系统。连续数次区分地址码的奇偶校验可以大大降低系统的错误报警率。 五、总结在此报警系统的软件和硬件的设计是合理的。它的可靠性是在可观地增加，而错误报警率在不断下降。实验表明，当断开检测器时错误报警率几乎为零。当连接微波双重辨识防盗探测器（DT - 400系列）时，其传输距离4公里大于开阔地带，错误报警率每
13、1000小时少于4次。由于断续工作且发送方式为每秒300波特，报警系统可以可靠地工作并且两个发送系统之间的时间差距小于0.2秒。事实上，它可以满足实际应用的各种需要。 Multifunctional Intelligent Wireless Alarm SystemAbstract: Making use of rich inner resource of FPGA Field Programmable Gate Arrays , a wireless alarm sending system is designed. It includes encoder, FSK Frequency Sh
14、ift Keying modulation and every channels control circuits, which can decrease volume and increase reliability of the alarm system.The demodulation of receive system is realized by an application specific integrated circuits MC3372. With the help of a single-chip microcomputer 89C51, the address deco
15、der is also designed in the receiver. Adding to other anti-interference,the alarming system has effectively decreased the error-alarm rate. The system can install up to 128 channel sending devices. It can send an alarm to the host when there are some cases in stand-off areas, and the system will dis
16、play on rotation multiple cases area codes . The transmission distance is greater than 4Km in open zones. User can install more than one type sensors simultaneously, for example, smog sensor, combustible gas sensor or burglar sensor. Experiments show that the wireless alarm system has the strengths
17、of high reliability, high anti-disturbance ability and low error-alarm rate. It can entirely meet the needs of alarm fireproofing and guard against theft, etc.Keywords: communication; Alarm systems; Frequency Shift Keying; Micro-controllers; Field Programmable Gate Arrays INTRODUCTION Compared with
18、a wired alert system, a wireless alarm system has characteristics of covertness and ease of installation. It is especially effective when transmitting between long distances in a complex landform situation. Made up of FPGA Field Programmable Gate-Array , the encoding module in the sending system cre
19、ates the address signal, FSK frequency shift keying modulates the signal and each channels controller signals. Using FPGA to replace MSI/SSI Middle Scale Integrated or Small scale Integrated digital circuit devices, not only increase the reliability and the resistance to interference of the alarm sy
20、stem, but it also decreases its volume and makes the system easier to install. Since used 7 bits binary number to express the address, up to 128 channels sender can be installed. The decoder consists of ASIC Application Specific Integrated Circuit and SCM in the wireless alarm receiver system, which
21、 can effectively decrease the error-alarm rate.THE SENDING SYSTEM PRINCIPLE Each stand-off is equipped with a wireless sending system,and corresponds with a 7 bits address identifier in binary. Once a case is detected by a sensor in any stand-off, a control signal of this area is sent to its encodin
22、g circuit via interface circuit, which converts the areas 7bit address identifier into FSK signal. Then FSK signal is transmitted into a frequency modulation circuit for frequency modulating. After power amplification, the frequency modulation electromagnetic wave is emitted via antenna. One charact
23、eristic of the sending system is discontinuous sending. In other words, the sending system does not send signals when there is no case, and do keep sending when there is an alarm situation, so as to provide chances to send signals for other stand-off areas. The Encoding and Controlling Circuit Confi
24、guration The digital circuit part of the encoding circuit is made by a FPGA chip which includes 8 modules.Formed by D triggers, module dff1 is the interface between detector and encoder. Module oscillator combines with some external resistors and capacitors to form a controllable low frequency multi
25、vibrator. Its control signal is the output of dff1-Q1. It does not vibrate when Q1is equal to 0, and if Q1is equal to 1, it vibrates to generate low frequency square waves. If some cases appear in the area, the oscillator controls the module SENDER to send electromagnetic wave discontinuously. The m
26、odule circular_shift_r is a parallel input serial output circular shift register. The bit A0A7 are the parallel address code input terminals, which are joined to high or low voltage level according to the encoder requirement. Q8 is the serial output terminal of the address code. Module dff2 is a con
27、trol circuit that is made of some JK triggers. Its setup signal is Q1, which also acts as a trigger signal after delay. Q2 acts as the parallel-in-serial-out control terminal of thecircular_shift_r module. When Q2 is at high voltage level,circular_shift_r performs parallel input. When Q2 is at low v
28、oltage level, circular_shift_r executes serial output. The module delay1 is a delay circuit composed of D triggers.The module division is a frequency division that creates three different routes frequency output signals, two of which branches and act as FSK modulating signals: f1 and f2. The other b
29、ranch acts as a triggering pulse for modules dff1 and delay1, and also acts as the clock pulse of circular_shift_rfor performing serial-out. The module MUX is a 2 to 1multiplexer. Its control signal is the output Q8 ofcircular_shift_r. When Q80, MUX produces the signal f2, and when Q81, it exports f
30、1. The module delay2combines with some external resistors and capacitors to form a delay circuit. Its function is to give workers some time to leave after installing the system. The sending circuit does no work within the delay time, no matter whether K1 detector is on or off. This is the external c
31、onnection drawing of the FPGA chip.B. The Working Principle As shown following, the working principle of the alarm system is as follows: when the power of the sending system turns on, the input of the dff1 is at low level. Then its output terminal Q1 is at logic value 0, NQ1 is at logic 1, and a ext
32、ernal light-emitting diode LED is lit to indicate the power is on. The signal Q1 is sent to the setting terminal of dff2 to set terminal Q2 at high level. The high level Q2 will set circular_shift_r into the parallel input address code mode. At this time, the outer transistor N2 is at saturation sta
33、te and N3 at cut-off state. This makes the sending circuit at a passive state, therefore, the circuit will not work. Hence, the circuit does not emit carrier wave if there is no case, and it is at low consumable power state.Once some cases appear, the switch K1 is on. The terminal D of the dff1 turn
34、s to high level immediately, and the output Q1of dff1 is set to high level at the rising edge of the clock pulse. It makes the setting terminal s of dff2 at high level too. The dff2 now is at normal working state. After delaying by module delay1, the former edge of the Q1 pulse will trigger dff2 to
35、output low voltage, which will make the transistor N2 off, N3 on, and the delays normally open contact will be closed. The electric power supply to the sending circuit is on, and the circuit begins to work normally. Simultaneously, if Q2 is at logic 0, circular_shift_r will be change to serial shift
36、 state and export address signals. When the address code is 0, the output of MUX will be f2. And when the address code is 1, the output will be f1. Terminals f2 and f1 act as the modulation signal for modulating the carrier wave. In this way, the address code is sent out at the first cycle of the lo
37、w frequency oscillator. At the second cycle it stops sending in order to give other stand-off a period of time to send. After the third cycle, repeat the procedure above. From the discussion above, we have the conclusion that the encoding and control circuit have the function to display when the pow
38、er is on, time delay for human to leave the spot, low power cost mode for waiting case, discontinuity sending and FSK modulating etc. It is more flexible and has more functions than many encoder ASIC. THE CONFIGURATION AND PRINCIPLE OF THE RECEIVING SYSTEM Set in guardhouse, a set of wireless receiv
39、er takes charge of monitoring all stand-off areas. The principle of the wireless receiver is show following. Passing by the low pass filter, the received modulation signal is sent into the high frequency common-emitter and common-base configuration cascade amplifier for amplifying. Then the signal i
40、s sent to the intermediate frequency modulation amplifier via the dual tuning circuit, i.e. sent into the input terminal 16th pin of an ASIC chip MC3372 to do mixing. The oscillate frequency of the local oscillator circuit is 455KHz higher than the received signal. Delivering to the first pin of the
41、 chip MC3372, the signal will mix with the external signal to get 455KHz intermediate frequency signal. After filtering, the intermediate frequency signal is first delivered to the 8th MC3372 pin to do frequency detection, and second amplified by an inner low frequency amplifier of the chip MC3372,
42、then the 9th pin exports the baseband signal. Amplified by a low frequency single transistor, the baseband signal is rectified by two steps Schmitt gates CD4584 to turn into a FSK signal, which will be sent into pin 3.0 of MCS to be decoded. MCS in this system is chip 89C51, which joins an outer 12M
43、HZ crystal oscillator. Its timer T1 act as a baud rate generator in mode 2, and SMOD 1,300 baud/sec. serial port is selected in mode 1, which means an asynchronous communication mode, 10 bit per frame in which the lower 7 bits of the 8 data bit is the address code, and the 8th acts as the parity che
44、ck bit. The system uses even check. When receiving an address code, the MCS firstly performs parity check. If it is correct ,then ,the MCS compare their value and takes out 7 bits address code and stores it into data buffer in memory. These procedures repeat 3 times in order to identify the 3 addres
45、s codes. If the 3 address codes are the same, the MCS will confirm that the receiving address signal is an effective alarm signal, that is to say, the address code is not a noise signal. It then triggers the alarm circuit to send the alarm sound. At the same time, the code number will display on the
46、 LED indicating which stand-off triggered the alarm. The LED uses a dynamic scan display method. If there are more than one stand-off areas have cases simultaneously, the MCS will display their code number in turn at 3 seconds intervals. The alarm audio process circuit uses a NE556 dual time base ci
47、rcuit chip to form a dual audio frequency multivibrator, which will give off a ringing alarm sound. System could configure sensors use for alarm of fire,combustible gas and theft.ANTI-INTERFERENCE MEASURE It is important to heighten the anti-interference ability for wireless communications. anti-dis
48、turbance measures takes form in the hardware. For example, one should reasonably arrange the PCB printed circuit board ，increase power decoupling, and place the high and low frequency filter reasonably. Since the receiver system includes high frequency circuits, separate the analogue circuit and digital circuit chip, and make each have its own ground. To guard against external and internal interference or high frequency radiation, put the high frequency amplifier and middle frequency amplifier channels in a metallic shield box a
