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1、1.2 Computer Generations,1.2.4 Fourth-Generation Computers:1971?Software development during the fourth computer generation started off with little change from the third generation.Operating systems were gradually improved,and new languages were designed.Database software became widely used during th
2、is time.The most important trend,however,resulted from the microcomputer revolution.Packaged software became widely available for microcomputers so that today most software is purchased,not developed from scratch.在计算机的第四代期间，软件的发展开始与第三代有所不同。操作系统在逐渐地改进，而新的语言被发明。期间数据库软件被广泛使用。然而，最重要的趋势起因于微型计算机革命。用于微型计算机
3、的软件包随处可得，因此今天大多数的软件可以购得,而不需从头开始开发。,1.2.5 Generationless ComputersWe may have defined our last generation of computers and begun the era of generationless computers.Even though computer manufacturers talk of“fifth”and“sixth”-generation computers,this talk is more a marketing play than a reflection of
4、 reality.我们可能已经定义了我们最新一代计算机而且开始了计算机的无代时代。即使计算机制造商谈到“第五”和“第六”代计算机,这些说法更多是市场行为，而不是真实的反映。Advocates of the concept of generationless computers say that even though technological innovations are coming in rapid succession,no single innovation is,or will be,significant enough to characterize another gener
5、ation of computers.无代计算机的观念提倡者说，即使科技革新接二连三地迅速出现,没有一种革新是,或将是足够重要，作为另一代计算机的特征。,1.2 Computer Generations,New Words=GigaByte,吉字节flops n.每秒浮点运算次数(floating-point operation per second),1.3 Near-future Supercomputer Directions,Some idea of what might be happening in the near future in supercomputer design c
6、an be gleaned from a press release issued by the US Department of Energy(DoE).It came out of the SUPERCOMPUTING 2002 Conference held last November in Baltimore,MD.The press release announced that the DoE had awarded IBM a$290(USD)million contract to build the two fastest supercomputers in the world
7、with a combined peak speed of 460 TFlops.To get an idea of the speed computing throughput 460 teraflops represents,the press release states that,“These two systems will have more than one-and-a-half times the combined processing power of all 500 machines on the recently announced TOP 500 List of Sup
8、ercomputers.”从美国能源部发行的通告中，可以收集一些有关在不久的将来超级计算机设计中可能发生的事情的概念。它来自在马里兰州巴尔的摩市召开的2002年超级计算会议。该通告称能源部已给IBM拨款2.9亿美元建造世界上最快的两部超级计算机，其最高综合速度为每秒460兆兆次。为了理解每秒460兆兆次速度的含义，通告解释说,“这两个系统将会具有最近发布的500强超级计算机的总处理能力的1.5倍还多。”,1.3 Near-future Supercomputer Directions,The first system,“ASCI Purple,”apparently the DoE likes
9、 colorful names will be the worlds first supercomputer capable of 100 Tflops.ASCI Purple will have a massive cluster of POWER-based IBM eServer systems and IBM storage systems.This supercomputer represents a fifth-generation system under the Advanced Simulation and Computing Initiative(ASCI)Program.
10、It will serve as the primary supercomputer for DoE.第一个系统“ASCI Purple”,显然能源部；生动的名字将会是世界的第一部能够运算每秒100兆兆次的超级计算机。ASCI Purple将具有基于POWER系列的IBM eServer 系统和 IBM 存储系统的宏大组群。这台超级计算机代表模拟和计算行动计划(ASCI)支持的第五代系统。它将作为能源部主要的超级计算机。,1.3 Near-future Supercomputer Directions,1.3 Near-future Supercomputer Directions,Accor
11、ding to the press release,the second system will be a research machine called Blue Gene/L.It will employ advanced IBM semiconductor and system technologies based on new architectures being developed by DoE and IBM.Blue Gene/L is expected to achieve a peak performance of 360 TFlops with 130,000 proce
12、ssors running under the Linux operating system.It will have the capability to process data at a rate of one terabit per second,equivalent to the data transmitted by ten thousand weather satellites.Applications are expected to include the simulation of very complex physical phenomena in areas such as
13、 turbulence,biology and high explosives.根据通告，第二个系统将会是一部被称为Blue Gene/L的研究机器，它将使用基于新结构的先进的IBM半导体和系统技术,该新结构是能源部和IBM共同开发的。Blue Gene/L具有13万台处理器，在Linux操作系统下运行，可望达到每秒360兆兆次的性能。它将具有以每秒1兆兆位的速度处理数据的能力,等同于一万个气象卫星传输的数据。其应用预期包括对非常复杂现象的模拟，如湍流、生物学和高空爆炸。,1.3 Near-future Supercomputer Directions,The ASCI Purple syst
14、em will use IBMs next generation microprocessor,the POWER5,employing a total of 12,544 of them.These 12,544 processors will be spread among 196 individual computers.The total memory bandwidth will be 156,000 GBs,the equivalent of simultaneously playing 31,200 DVD movies.A super-fast data highway wit
15、h a total interconnect bandwidth of 12,500 GB will interconnect the 196 computers.The IBM AIXL operating system will be used to run this configuration.The operating system will contain 50 terabytes of memory,an amount that is 400,000 times the capacity of the average desktop PC.There will also be tw
16、o petabytes of disk storage or holding the content of approximately one billion books.ASCI Purple系统将使用IBM的下一代微处理器POWER5,总数为12,544个。这12,544个处理器将分布在196部单独的计算机之中。总内存带宽将是15.6GB,等同于同时地播放 31,200部DVD电影。一条具有12,500 GB带宽的超快速数据通道将会把196台计算机互相连接。IBM AIXL 操作系统将用于运行一个配置。该操作系统将包50兆兆字节内存，容量是平均桌面个人计算机的40万倍。还将有2千兆兆字节的
17、磁盘存储，或可容纳大约十亿本书的内容。,1.3 Near-future Supercomputer Directions,Finally,since the UNIVAC-1s introduction,raw computer speed has increased by about 11 to 12 orders of magnitude in about 50 years,or a factor of 10 every five years.This is a truly remarkable achievement.Its also interesting to contemplate
18、 that,if this growth continues over the next 50 years,then by the 100th anniversary of the UNIVAC-1,computers will be operating at speeds on the order of 1023 Flops!最后,自从UNIVAC-1的发明以来,计算机的原始速度在50年内增加了11至12个数量级，或每五年增加10倍。这是一个真正显著的成就。设想一下也很有趣,如果在未来50年间仍以这样的速度持续增长,到UNIVAC-1诞生的100周年，计算机将会以大约每秒1023次的浮点运算
19、速度运行!,一、复杂长句多科技文章要求叙述准确，推理谨严，因此一句话里包含三四个甚至五六个分句的，并非少见。译成汉语时，必须按照汉语习惯破成适当数目的分句，才能条理清楚，避免洋腔洋调。这种复杂长句居科技英语难点之首，要学会运用语法分析方法来加以解剖，以便以短代长，化难为易。例如：Factories will not buy machines unless they believe that the machine will produce goods that they are able to sell to consumers at a price that will cover all c
20、ost.这是由一个主句和四个从句组成的复杂长句，只有进行必要的语法分析，才能正确理解和翻译。现试译如下：除非相信那些机器造出的产品卖给消费者的价格足够支付所有成本，否则厂家是不会买那些机器的。节译：要不相信那些机器造出的产品售价够本，厂家是不会买的。后一句只用了24个字，比前句40个字节约用字40%，而对原句的基本内容无损。可见，只要吃透原文的结构和内涵，翻译时再在汉语上反复推敲提炼，复杂的英语长句，也是容易驾驭的。,科技英语的特点,科技英语的特点,二、被动语态多英语使用被动语态大大多于汉语，如莎士比亚传世名剧罗密欧与朱丽叶中的一句就两次用了被动语态：Juliet was torn betwe
21、en desire to keep Romeo near her and fear for his life,should his presence be detected.朱丽叶精神上受到折磨，既渴望和罗密欧形影不离，又担心罗密欧万一让人发现，难免有性命之忧。科技英语更是如此，有三分之一以上用被动语态。例如：(a)No work can be done without energy.译文：没有能量决不能做功。(b)All business decisions must now be made in the light of the market.译文：所有企业现在必须根据市场来作出决策。,科
22、技英语的特点,三、非谓语动词多英语每个简单句中，只能用一个谓语动词，如果读到几个动作，就必须选出主要动作当谓语，而将其余动作用非谓语动词形式，才能符合英语语法要求。非谓语动词有三种：动名词、分词（包括现在分词和过去分词）和不定式。例如：要成为一个名符其实的内行，需要学到老。这句中，有“成为”、“需要”和“学”三个表示动作的词，译成英语后为：To be a true professional requires lifelong learning.可以看出，选好“需要”（require）作为谓语，其余两个动作：“成为”用不定式形式 to be，而“学”用动名词形式learning，这样才能符合英语
23、语法要求。,科技英语的特点,四、词性转换多英语单词有不少是多性词，即既是名词，又可用作动词、形容词、介词或副词，字形无殊，功能各异，含义也各不相同，如不仔细观察，必致谬误。例如,light名词：(启发)in(the)light of由于，根据；(光)high light(s)强光，精华；(灯)safety light 安全指示灯形容词：(轻)light industry 轻工业；(明亮)light room 明亮的房间；(淡)light blue 淡蓝色；(薄)light coating 薄涂层动词：（点燃）light up the lamp 点灯副词：（轻快）travel light 轻装旅
24、行（容易）light come,light go 来得容易去得快诸如此类的词性转换，在科技英语中屡见不鲜，几乎每个技术名词都可转换为同义的形容词。词性转换增加了英语的灵活性和表现力，读者必须从上下文判明用词在句中是何种词性，而且含义如何，才能对全句得到正确无误的理解。,Computer English,Chapter 2 Organization of Computers,Key points:useful terms and organization of computersDifficult points:describing the organization of computers,R
25、equirements:,1.Terms of computer hardware,2.Organization of computers and their functions,3.掌握专业词汇的构成规律，特别是常用词缀及复合词的构成,New Words&Expressions:instruction cycle 指令周期decode vt.解码,译解bus n.总线pins n.插脚,管脚uppermost adj.最高的；adv.在最上address bus 地址总线data bus 数据总线via prep.经,通过,经由multibit 多位bidirectional 双向的unid
26、irectional 单向的hierarchy n.层次，层级microprocessor n.微处理器register n.寄存器timing n.定时；时序；时间选择synchronize vt.使.同步assert vt.主张，发出deassert vt.撤销trigger vt.引发,引起,触发map v.映射port n.端口,2.1 Basic Organization of Computers,Abbreviations:CPU(Central Processing Unit)中央处理器 I/O(Input/Output)输入输出(设备),2.1 Basic Organizati
27、on of Computers,Fig.2-1 Generic computer organization,2.1 Basic Organization of Computers,Most computer systems,from the embedded controllers found in automobiles and consumer appliances to personal computers and mainframes,have the same basic organization.This organization has three main components
28、:the CPU,the memory subsystem,and the I/O subsystem.The generic organization of these components is shown in Figure 2-1.,大多数计算机系统，从汽车和日用电器中的嵌入式控制器到个人计算机和大型主机，都具有相同的基本组成。其基本组成包括三个主要部件：CPU、存储器子系统和I/O子系统。这些部件的一般组成如图2-1所示。,Physically,a bus is a set of wires.The components of the computer are connected t
29、o the buses.To send information from one component to another,the source component outputs data onto the bus.The destination component then inputs this data from the bus.As the complexity of a computer system increases,it becomes more efficient(in terms of minimizing connections)at using buses rathe
30、r than direct connections between every pair of devices.Buses use less space on a circuit board and require less power than a large number of direct connections.They also require fewer pins on the chip or chips that comprise the CPU.,2.1.1 System Buses,从物理上来说，总线就是一组导线。计算机的部件就是连在总线上的。为了将信息从一个部件传到另一个部
31、件，源部件先将数据输出到总线上，然后目标部件再从总线上接受这些数据。随着计算机系统复杂性的不断增长，使用总线比每个设备对之间直接连接要有效得多（就减少连接数量而言）。与大量的直接连接相比，总线使用较少的电路板空间，耗能更少，并且在芯片或组成CPU的芯片组上需要较少的引脚。,The system shown in Figure 2-1 has three buses.The uppermost bus in this figure is the address bus.When the CPU reads data or instructions from or writes data to m
32、emory,it must specify the address of the memory location it wishes to access.It outputs this address to the address bus;memory inputs this address from the address bus and use it to access the proper memory location.Each I/O devices,such as a keyboard,monitor,or disk drive,has a unique address as we
33、ll.When accessing an I/O device,the CPU places the address of the device on the address bus.Each device can read the address off of the bus and determine whether it is the device being accessed by the CPU.Unlike the other buses,the address bus always receives data from the CPU;the CPU never reads th
34、e address bus.,图2-1所示的系统包括三组总线。最上面的是地址总线。当CPU从存储器读取数据或指令，或写数据到存储器时，它必须指明将要访问的存储器单元地址。CPU将地址输出到地址总线上，而存储器从地址总线上读取地址，并且用它来访问正确的存储单元。每个I/O设备，比如键盘、显示器或者磁盘，同样都有一个唯一的地址。当访问某个I/O设备时，CPU将此设备的地址放到地址总线上。每一个设备均从总线上读取地址并且判断自己是否就是CPU正要访问的设备。与其他总线不同，地址总线总是从CPU上接收信息，而CPU从不读取地址总线。,2.1.1 System Buses,Data is transfe
35、rred via the data bus.When the CPU fetches data from memory,it first outputs the memory address on its address bus.Then memory outputs the data onto the data bus;the CPU can then read the data from the data bus.When writing data to memory,the CPU first outputs the address onto the address bus,then o
36、utputs the data onto the data bus.Memory then reads and stores the data at the proper location.The processes for reading data from and writing data to the I/O devices are similar.,数据是通过数据总线传送的。当CPU从存储器中取数据时，它首先把存储器地址输出到地址总线上，然后存储器将数据输出到数据总线上，这样CPU就可以从数据总线上读取数据了。当CPU向存储器中写数据时，它首先将地址输出到地址总线上，然后把数据输出到数
37、据总线上，这样存储器就可以从数据总线上读取数据并将它存储到正确的单元中。对I/O设备读写数据的过程与此类似。,2.1.1 System Buses,The control bus is different from the other two buses.The address bus consists of n lines,which combine to transmit one n-bit address value.Similarly,the lines of the data bus work together to transmit a single multibit value.
38、In contrast,the control bus is a collection of individual control signals.These signals indicate whether data is to be read into or written out of the CPU,whether the CPU is accessing memory or an I/O device,and whether the I/O device or memory is ready to transfer data.Although this bus is shown as
39、 bidirectional in Figure 2-1,it is really a collection of(mostly)unidirectional signals.Most of these signals are output from the CPU to the memory and I/O subsystems,although a few are output by these subsystems to the CPU.We examine these signals in more detail when we look at the instruction cycl
40、e and the subsystem interface.,控制总线与以上两种总线都不相同。地址总线由n根线构成，n根线联合传送一个n位的地址值。类似地，数据总线的各条线合起来传输一个单独的多位值。相反，控制总线是单根控制信号的集合。这些信号用来指示数据是要读入CPU还是要从CPU写出，CPU是要访问存储器还是要访问I/O设备，是I/O设备还是存储器已就绪要传送数据等等。虽然图2-1所示的控制总线看起来是双向的，但它实际上（主要）是单向（大多数都是）信号的集合。大多数信号是从CPU输出到存储器与I/O子系统的，只有少数是从这些子系统输出到CPU的。在介绍指令周期和子系统接口时，我们将详细地讨
41、论这些信号。,2.1.1 System Buses,A system may have a hierarchy of buses.For example,it may use its address,data,and control buses to access memory,and an I/O controller.The I/O controller,in turn,may access all I/O devices using a second bus,often called an I/O bus or a local bus.,一个系统可能具有分层次的总线。例如，它可能使用地址
42、、数据和控制总线来访问存储器和I/O控制器。I/O控制器可能依次使用第二级总线来访问所有的I/O设备，第二级总线通常称为I/O总线或者局部总线。,2.1.1 System Buses,The instruction cycle is the procedure a microprocessor goes through to process an instruction.First the microprocessor fetches,or reads,the instruction from memory.Then it decodes the instruction,determining
43、 which instruction it has fetched.Finally,it performs the operations necessary to execute the instruction.(Some people also include an additional element in the instruction cycle to store results.Here,we include that operation as part of the execute function.)Each of these functions-fetch,decode,and
44、 execute-consists of a sequence of one or more operations.,指令周期是微处理器完成一条指令处理的步骤。首先，微处理器从存储器读取指令，然后将指令译码，辩明它取的是哪一条指令。最后，它完成必要的操作来执行指令（有人认为在指令周期中还要包括一个附加的步骤来存储结果，这里我们把该操作当作执行功能的一部分）。每一个功能读取、译码和执行都包括一个或多个操作。,2.1.2 Instruction Cycle,Lets start where the computer starts,with the microprocessor fetching t
45、he instruction from memory.First,the microprocessor places the address of the instruction on to the address bus.The memory subsystem inputs this address and decodes it to access the sired memory location.(We look at how this decoding occurs when we examine the memory subsystem in more detail later i
46、n this chapter.),我们从微处理器从存储器中取指令开始讲述。首先，微处理器把指令的地址放到地址总线上，然后，存储器子系统从总线上输入该地址并予以译码，去访问指定的存储单元。（译码是如何进行的，我们将在后面的章节中介绍存储器子系统是更为详细的讨论。）,2.1.2 Instruction Cycle,After the microprocessor allows sufficient time for memory to decode the address and access the requested memory location,the microprocessor ass
47、erts a READ control signal.The READ signal is a signal on the control bus which the microprocessor asserts when it is ready to read data from memory or an I/O device.(Some processors have a different name for this signal,but all microprocessors have a signal to perform this function.)Depending on th
48、e microprocessor,the READ signal may be active high(asserted-1)or active low(asserted-0).,当微处理器为存储器留出充足的时间来对地址译码和访问所需的存储单元之后，微处理器发出一个读（READ）控制信号。当微处理器准备好可以从存储器或是I/O设备读数据时，它就在控制总线上发一个读信号。（一些处理器对于这个信号有不同的名字，但所有处理器都有这样的信号来执行这个功能。）根据微处理器的不同，读信号可能是高电平有效（信号=1），也可能是低电平有效（信号=0）。,2.1.2 Instruction Cycle,When
49、 the READ signal is asserted,the memory subsystem places the instruction code to be fetched onto the computer systems data bus,The microprocessor then inputs this data from the bus and stores it in one of its internal registers.At this point,the microprocessor has fetched the instruction.,读信号发出后，存储器
50、子系统就把要取的指令码放到计算机的数据总线上，微处理器就从数据总线上输入该数据并且将它存储在其内部的某个寄存器中。至此，微处理器已经取得了指令。,2.1.2 Instruction Cycle,Next,the microprocessor decodes the instruction.Each instruction may require a different sequence of operations to execute the instruction.When the microprocessor decodes the instruction,it determines wh
